EUR 77,17
Anzahl: Mehr als 20 verfügbar
In den WarenkorbKartoniert / Broschiert. Zustand: New.
Anbieter: preigu, Osnabrück, Deutschland
Taschenbuch. Zustand: Neu. Logic Synthesis and SOC Prototyping | RTL Design using VHDL | Vaibbhav Taraate | Taschenbuch | xix | Englisch | 2021 | Springer | EAN 9789811513169 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
Sprache: Englisch
Verlag: Springer Nature Singapore, Springer Nature Singapore, 2021
ISBN 10: 9811513163 ISBN 13: 9789811513169
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book describes RTL design, synthesis, and timing closure strategies for SOC blocks. It covers high-level RTL design scenarios and challenges for SOC design. The book gives practical information on the issues in SOC and ASIC prototyping using modern high-density FPGAs. The book covers SOC performance improvement techniques, testing, and system-level verification. The book also describes the modern Xilinx FPGA architecture and their use in SOC prototyping. The book covers the Synopsys DC, PT commands, and use of them to constraint and to optimize SOC design. The contents of this book will be of use to students, professionals, and hobbyists alike.