ISBN: 9789811093210 - high-level estimation and exploration of reliability for multi-processor system-on-chip (computer architecture and design methodologies) (5 Ergebnisse)

Zustand: New. In English.

Zustand: New.

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures. …

Paperback. Zustand: Brand New. reprint edition. 197 pages. 9.25x6.10x0.47 inches. In Stock.

Taschenbuch. Zustand: Neu. High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip | Zheng Wang (u. a.) | Taschenbuch | Computer Architecture and Design Methodologies | xx | Englisch | 2018 | Springer | EAN 9789811093210 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.…