9780792380733 - High-Level Power Analysis and Optimization von Raghunathan, Anand; Jha, Niraj K.; Dey, Sujit (6 Ergebnisse)

Hardcover. Zustand: Very Good. Zustand des Schutzumschlags: No Dust Jacket. Hardcover. No jacket. A few marks on boards. Leading corners are slightly worn. Minor dent on upper edge of rear board. Spine ends are a little bumped. Previous owner's name penned on FEP. Binding is tight, contents are clean and clear throughout. AM. Used.

hardcover. Zustand: Sehr gut. 194 Seiten; 9780792380733.2 Gewicht in Gramm: 1.

Zustand: New. In.

Zustand: Gut. Zustand: Gut | Sprache: Englisch | Produktart: Bücher | High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level. High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power. High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies.

Zustand: New. Presents a description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis). Num Pages: 175 pages, biography. BIC Classification: THR; TJF. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate. Dimension: 254 x 178 x 12. Weight in Grams: 568. . 1997. Hardback. . . . . Books ship from the US and Ireland.

Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level. High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power. High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies.