Overhauser david v (12 Ergebnisse)
Switch-Level Timing Simulation of MOS VLSI Circuits
Overhauser, David V., Rao, Vasant B., Trick, Timothy, Hajj, Ibrahim N.
- Hardcover
Anbieter: Better World Books, Mishawaka, IN, USABetter World Books
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Gebraucht - Befriedigend
EUR 65,91
Versand nach gratisVersand innerhalb von USAAnzahl: 1 verfügbar
Zustand: Good. Former library copy. Pages intact with minimal writing/highlighting. The binding may be loose and creased. Dust jackets/supplements are not included. Includes library markings. Stock photo provided. Product includes identifying sticker. Better World Books: Buy Books. Do Good.
- Hardcover
Anbieter: ThriftBooks-Dallas, Dallas, TX, USAThriftBooks-Dallas
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Gebraucht - Befriedigend
EUR 80,89
Versand nach gratisVersand innerhalb von USAAnzahl: 1 verfügbar
Hardcover. Zustand: Good. No Jacket. Pages can have notes/highlighting. Spine may show signs of wear. ~ ThriftBooks: Read More, Spend Less.
Switch-Level Timing Simulation of MOS VLSI Circuits (The Springer International Series in Engineering and Computer Science, 66)
Rao, Vasant B.; Overhauser, David V.; Trick, Timothy N.; Hajj, Ibrahim N.
- Hardcover
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes KönigreichRia Christie Collections
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 116,32
EUR 13,96 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. In.
Switch-Level Timing Simulation of MOS VLSI Circuits (The Springer International Series in Engineering and Computer Science, 66)
Rao, Vasant B.; Overhauser, David V.; Trick, Timothy N.; Hajj, Ibrahim N.
- Softcover
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes KönigreichRia Christie Collections
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 116,32
EUR 13,96 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. In.
- Hardcover
Anbieter: Buchpark, Trebbin, DeutschlandBuchpark
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Gebraucht - Gut
EUR 22,59
EUR 105,00 VersandVersand von Deutschland nach USAAnzahl: 2 verfügbar
Zustand: Gut. Zustand: Gut | Seiten: 292 | Sprache: Englisch | Produktart: Bücher | Digital Timing Macromodeling for VLSI Design Verification first of all provides an extensive history of the development of simulation techniques. It presents detailed discussion of the various techniques implemented in circuit, timing, fast-timin…g, switch-level timing, switch-level, and gate-level simulation. It also discusses mixed-mode simulation and interconnection analysis methods. The review in Chapter 2 gives an understanding of the advantages and disadvantages of the many techniques applied in modern digital macromodels. The book also presents a wide variety of techniques for performing nonlinear macromodeling of digital MOS subcircuits which address a large number of shortcomings in existing digital MOS macromodels. Specifically, the techniques address the device model detail, transistor coupling capacitance, effective channel length modulation, series transistor reduction, effective transconductance, input terminal dependence, gate parasitic capacitance, the body effect, the impact of parasitic RC-interconnects, and the effect of transmission gates. The techniques address major sources of errors in existing macromodeling techniques, which must be addressed if macromodeling is to be accepted in commercial CAD tools by chip designers. The techniques presented in Chapters 4-6 can be implemented in other macromodels, and are demonstrated using the macromodel presented in Chapter 3. The new techniques are validated over an extremely wide range of operating conditions: much wider than has been presented for previous macromodels, thus demonstrating the wide range of applicability of these techniques.
- Weitere Bilder
Switch-Level Timing Simulation of MOS VLSI Circuits
Vasant B. Rao|David V. Overhauser|Timothy N. Trick|Ibrahim N. Hajj
- Hardcover
Anbieter: moluna, Greven, Deutschlandmoluna
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 118,64
EUR 48,99 VersandVersand von Deutschland nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In thos.
- Softcover
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes KönigreichRia Christie Collections
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 165,50
EUR 13,96 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. In.
- Hardcover
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes KönigreichRia Christie Collections
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 165,50
EUR 13,96 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. In.
- Weitere Bilder
Switch-Level Timing Simulation of MOS VLSI Circuits
Vasant B. Rao|David V. Overhauser|Timothy N. Trick|Ibrahim N. Hajj
- Softcover
Anbieter: moluna, Greven, Deutschlandmoluna
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 128,20
EUR 48,99 VersandVersand von Deutschland nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In thos.
- Weitere Bilder
- Softcover
Anbieter: AHA-BUCH GmbH, Einbeck, DeutschlandAHA-BUCH GmbH
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 156,71
EUR 61,74 VersandVersand von Deutschland nach USAAnzahl: 2 verfügbar
Taschenbuch. Zustand: Neu. Neuware - Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user fr…iendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation.
- Weitere Bilder
- Hardcover
Anbieter: AHA-BUCH GmbH, Einbeck, DeutschlandAHA-BUCH GmbH
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 161,00
EUR 62,52 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
Buch. Zustand: Neu. Neuware - Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly,… models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation.
- Weitere Bilder
- Softcover
Anbieter: AHA-BUCH GmbH, Einbeck, DeutschlandAHA-BUCH GmbH
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 167,14
EUR 62,23 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Digital Timing Macromodeling for VLSI Design Verification first of all provides an extensive history of the development of simulation techniques. It presents detailed discussion of the various techniques implemented in circuit, timing, fast-timing, s…witch-level timing, switch-level, and gate-level simulation. It also discusses mixed-mode simulation and interconnection analysis methods. The review in Chapter 2 gives an understanding of the advantages and disadvantages of the many techniques applied in modern digital macromodels. The book also presents a wide variety of techniques for performing nonlinear macromodeling of digital MOS subcircuits which address a large number of shortcomings in existing digital MOS macromodels. Specifically, the techniques address the device model detail, transistor coupling capacitance, effective channel length modulation, series transistor reduction, effective transconductance, input terminal dependence, gate parasitic capacitance, the body effect, the impact of parasitic RC-interconnects, and the effect of transmission gates. The techniques address major sources of errors in existing macromodeling techniques, which must be addressed if macromodeling is to be accepted in commercial CAD tools by chip designers. The techniques presented in Chapters 4-6 can be implemented in other macromodels, and are demonstrated using the macromodel presented in Chapter 3. The new techniques are validated over an extremely wide range of operating conditions: much wider than has been presented for previous macromodels, thus demonstrating the wide range of applicability of these techniques.
