Kundu sandip (14 Ergebnisse)

hardcover. Zustand: Very Good. No Dust Jacket. First Edition. Printed boards, no jacket. Exterior a little worn, grubby; previous owner's name on FEP; contents otherwise clean, sound, bright. TPW. Used.

Hardcover. Zustand: Very Good. No Dust Jacket. Name from previous owner on FEP. No dust jacket. Binding is very well preserved, though with light surface wear to covers. Pages are clean and crisp, and printing is tight, clean and bright throughout. MB. Used.

Paperback. Zustand: Brand New. 100 pages. 8.66x5.91x0.23 inches. In Stock.

Zustand: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.

Taschenbuch. Zustand: Neu. How to write a Dissertation? An example with its merits & demerits | A Cross-Sectional survey of Chronic Kidney Disease in a Tertiary Care Hospital in Eastern Region of India | Sandip Kumar Kundu | Taschenbuch | 100 S. | Englisch | 2017 | LAP LAMBERT Academic Publishing | EAN 9786202021784 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.…

Zustand: Sehr gut. Zustand: Sehr gut | Seiten: 260 | Sprache: Englisch | Produktart: Bücher | In the last few years CMOS technology has become increas­ ingly dominant for realizing Very Large Scale Integrated (VLSI) circuits. The popularity of this technology is due to its high den­ sity and low power requirement. The ability to realize very com­ plex circuits on a single chip has brought about a revolution in the world of electronics and computers. However, the rapid advance­ ments in this area pose many new problems in the area of testing. Testing has become a very time-consuming process. In order to ease the burden of testing, many schemes for designing the circuit for improved testability have been presented. These design for testability techniques have begun to catch the attention of chip manufacturers. The trend is towards placing increased emphasis on these techniques. Another byproduct of the increase in the complexity of chips is their higher susceptibility to faults. In order to take care of this problem, we need to build fault-tolerant systems. The area of fault-tolerant computing has steadily gained in importance. Today many universities offer courses in the areas of digital system testing and fault-tolerant computing. Due to the impor­ tance of CMOS technology, a significant portion of these courses may be devoted to CMOS testing. This book has been written as a reference text for such courses offered at the senior or graduate level. Familiarity with logic design and switching theory is assumed. The book should also prove to be useful to professionals working in the semiconductor industry.…

Zustand: Used. pp. xv + 296 Illus.

Zustand: Used. pp. xv + 296.

Gebunden. Zustand: New.

Zustand: New.

Zustand: New. In English.

Zustand: New. In English.

Gebunden. Zustand: New. Cutting-edge Design for Manufacturability Techniques for Nanoscale CMOS VLSI CircuitsCutting-edge Design for Manufacturability Techniques for Nanoscale CMOS VLSI Circuits Covering defect analysis, equipment, and lithographic control evaluations, t.

Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - In the last few years CMOS technology has become increas ingly dominant for realizing Very Large Scale Integrated (VLSI) circuits. The popularity of this technology is due to its high den sity and low power requirement. The ability to realize very com plex circuits on a single chip has brought about a revolution in the world of electronics and computers. However, the rapid advance ments in this area pose many new problems in the area of testing. Testing has become a very time-consuming process. In order to ease the burden of testing, many schemes for designing the circuit for improved testability have been presented. These design for testability techniques have begun to catch the attention of chip manufacturers. The trend is towards placing increased emphasis on these techniques. Another byproduct of the increase in the complexity of chips is their higher susceptibility to faults. In order to take care of this problem, we need to build fault-tolerant systems. The area of fault-tolerant computing has steadily gained in importance. Today many universities offer courses in the areas of digital system testing and fault-tolerant computing. Due to the impor tance of CMOS technology, a significant portion of these courses may be devoted to CMOS testing. This book has been written as a reference text for such courses offered at the senior or graduate level. Familiarity with logic design and switching theory is assumed. The book should also prove to be useful to professionals working in the semiconductor industry.…