Gielen georges (87 Ergebnisse)

Hard Cover. Zustand: Good. No Jacket. Usual ex-library features. The interior is clean and tight. Binding is good. Cover shows light wear. 287 pages. Ex-Library.

Zustand: New. In English.

Softcover, foto-papieromslag, 185 x 265mm., 64pp., uitgebreide foto-illustratie in kleur en z/w. ISBN 9028909699. Rond Leuvense stoof en petroleumlamp - Poppenzielen van zaagmeel - Volksdevotie en bijgeloof - Voospellers, kaartleggers en pendelaars. In goede staat. 500 g.

Zustand: Good. Your purchase helps support Sri Lankan Children's Charity 'The Rainbow Centre'. Ex-library, so some stamps and wear, but in good overall condition. Our donations to The Rainbow Centre have helped provide an education and a safe haven to hundreds of children who live in appalling conditions.…

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book demonstrates why highly-digital CMOS time-encoding analog-to-digital converters incorporating voltage-controlled oscillators (VCOs) and time-to-digital converters (TDCs) are a good alternative to traditional switched-capacitorS-Dmodulators for power-efficient sensor, biomedical and communications applications. The authors describe the theoretical foundations and design methodology of such time-based ADCs from the basics to the latest developments. While most analog designers might notice some resemblance to PLL design, the book clearly highlights the differences to standard PLL circuit design and illustrates the design methodology with practical circuit design examples.Describes in detail the design methodology for CMOS time-encoding analog-to-digital converters that can be integrated along with digital logic in a nanometer System on Chip;Assists analog designers with the necessary change in design paradigm, highlighting differences between designing time-based ADCs and traditional analog circuits like switched-capacitor converters and PLLs;Uses a highly-visual, tutorial approach to the topic, including many practical examples of techniques introduced.…

Zustand: New.

Zustand: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.

Zustand: Good. Pages intact with minimal writing/highlighting. The binding may be loose and creased. Dust jackets/supplements are not included. Stock photo provided. Product includes identifying sticker. Better World Books: Buy Books. Do Good.

PAP. Zustand: New. New Book. Shipped from UK. Established seller since 2000.

PAP. Zustand: New. New Book. Shipped from UK. Established seller since 2000.

Zustand: New.

Zustand: New. In English.

Zustand: New. In English.

Zustand: New. In English.

Zustand: New. In English.

Taschenbuch. Zustand: Neu. Time-encoding VCO-ADCs for Integrated Systems-on-Chip | Principles, Architectures and Circuits | Georges Gielen (u. a.) | Taschenbuch | v | Englisch | 2023 | Springer | EAN 9783030880699 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.…

Zustand: New. In English.

Zustand: New. In English.

Zustand: New. In English.

Zustand: New. In English.

Zustand: New. In English.

Zustand: New. In English.

Zustand: New. In English.

Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book demonstrates why highly-digital CMOS time-encoding analog-to-digital converters incorporating voltage-controlled oscillators (VCOs) and time-to-digital converters (TDCs) are a good alternative to traditional switched-capacitorS-Dmodulators for power-efficient sensor, biomedical and communications applications. The authors describe the theoretical foundations and design methodology of such time-based ADCs from the basics to the latest developments. While most analog designers might notice some resemblance to PLL design, the book clearly highlights the differences to standard PLL circuit design and illustrates the design methodology with practical circuit design examples.Describes in detail the design methodology for CMOS time-encoding analog-to-digital converters that can be integrated along with digital logic in a nanometer System on Chip;Assists analog designers with the necessary change in design paradigm, highlighting differences between designing time-based ADCs and traditional analog circuits like switched-capacitor converters and PLLs;Uses a highly-visual, tutorial approach to the topic, including many practical examples of techniques introduced.…

hardcover. Zustand: Fine.

Zustand: New. In English.

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book discusses both architecture- and circuit-level design aspects of voltage-controlled-oscillator (VCO)-based analog-to-digital converters (ADCs), especially focusing on mitigation of VCO nonlinearity and the improvement of power efficiency. It shows readers how to develop power-efficient complementary-metal-oxide-semiconductor (CMOS) ADCs for applications such as LTE, 802.11n, and VDSL2+. The material covered can also be applied to other specifications and technologies. Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems begins with a general introduction to the applications of an ADC in communications systems and the basic concepts of VCO-based ADCs. The text addresses a wide range of converter architectures including open- and closed-loop technologies. Special attention is paid to the replacement of power-hungry analog blocks with VCO-based circuits and to the mitigation of VCO nonlinearity. Various MATLAB®/Simulink® models are provided for important circuit nonidealities, allowing designers and researchers to determine the required specifications for the different building blocks that form the systematic integrated-circuit design procedure. Five different VCO-based ADC design examples are presented, introducing innovations at both architecture and circuit levels. Of these designs, the best power efficiency of a high-bandwidth oversampling ADC is achieved in a 40 nm CMOS demonstration. This book is essential reading material for engineers and researchers working on low-power-analog and mixed-signal design and may be used by instructors teaching advanced courses on the subject. It provides a clear overview and comparison of VCO-based ADC architectures and gives the reader insight into the most important circuit imperfections.…

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book focuses on modeling, simulation and analysis of analog circuit aging. First, all important nanometer CMOS physical effects resulting in circuit unreliability are reviewed. Then, transistor aging compact models for circuit simulation are discussed and several methods for efficient circuit reliability simulation are explained and compared. Ultimately, the impact of transistor aging on analog circuits is studied. Aging-resilient and aging-immune circuits are identified and the impact of technology scaling is discussed. The models and simulation techniques described in the book are intended as an aid for device engineers, circuit designers and the EDA community to understand and to mitigate the impact of aging effects on nanometer CMOS ICs.…

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book brings together important contributions and state-of-the-art research results in the rapidly advancing area of symbolic analysis of analog circuits. It is also of interest to those working in analog CAD. The book is an excellent reference, providing insights into some of the most important issues in the symbolic analysis of analog circuits.…

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Analog integrated circuits are very important as interfaces between the digital parts of integrated electronic systems and the outside world. A large portion of the effort involved in designing these circuits is spent in the layout phase. Whereas the physical design of digital circuits is automated to a large extent, the layout of analog circuits is still a manual, time-consuming and error-prone task. This is mainly due to the continuous nature of analog signals, which causes analog circuit performance to be very sensitive to layout parasitics. The parasitic elements associated with interconnect wires cause loading and coupling effects that degrade the frequency behaviour and the noise performance of analog circuits. Device mismatch and thermal effects put a fundamental limit on the achievable accuracy of circuits. For successful automation of analog layout, advanced place and route tools that can handle these critical parasitics are required. In the past, automatic analog layout tools tried to optimize the layout without quantifying the performance degradation introduced by layout parasitics. Therefore, it was not guaranteed that the resulting layout met the specifications and one or more layout iterations could be needed. In Analog Layout Generation for Performance and Manufacturability, the authors propose a performance driven layout strategy to overcome this problem. In this methodology, the layout tools are driven by performance constraints, such that the final layout, with parasitic effects, still satisfies the specifications of the circuit. The performance degradation associated with an intermediate layout solution is evaluated at runtime using predetermined sensitivities. In contrast with other performance driven layout methodologies, the tools proposed in this book operate directly on the performance constraints, without an intermediate parasitic constraint generation step. This approach makes a completeand sensible trade-off between the different layout alternatives possible at runtime and therefore eliminates the possible feedback route between constraint derivation, placement and layout extraction. Besides its influence on the performance, layout also has a profound impact on the yield and testability of an analog circuit. In Analog Layout Generation for Performance and Manufacturability, the authors outline a new criterion to quantify the detectability of a fault and combine this with a yield model to evaluate the testability of an integrated circuit layout. They then integrate this technique with their performance driven routing algorithm to produce layouts that have optimal manufacturability while still meeting their performance specifications. Analog Layout Generation for Performance and Manufacturability will be of interest to analog engineers, researchers and students.…