friedman eby (58 Ergebnisse)

Zustand: Very Good. 1st Edition. Former library book; may include library markings. Used book that is in excellent condition. May show signs of wear or have minor defects.

hardcover. Zustand: Very Good. Zustand des Schutzumschlags: No Dust Jacket. Name from previous owner on FEP. Otherwise like new. No dust jacket. MB. Used.

1st ed. 19 x 24 cm. 336 pages. Hardcover. Versand aus Deutschland / We dispatch from Germany via Air Mail. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped. Sprache: Englisch.

hardcover. Zustand: Very Good. Zustand des Schutzumschlags: No Dust Jacket. First Edition. Hard cover without jacket. Book is in very good condition; very light wear in a couple of places to edges and corners. Previous owner's name on FEP; Contents are otherwise clean, bright and tight. J. Used.

hardcover. Zustand: Very Good. Zustand des Schutzumschlags: No Dust Jacket. First Edition. Orange hardcover and contents in almost new condition, showing minimal signs of wear. Previous owner's name on FEP. Profusely illustrated by diagrams and tables. No dust jacket. T. Used.

PAP. Zustand: New. New Book. Shipped from UK. Established seller since 2000.

PAP. Zustand: New. New Book. Shipped from UK. Established seller since 2000.

Zustand: New. pp. 284 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.

Hardcover. Zustand: Very Good. No Jacket. Former library book; May have limited writing in cover pages. Pages are unmarked. ~ ThriftBooks: Read More, Spend Less.

Hardcover. Zustand: Very Good. No Jacket. May have limited writing in cover pages. Pages are unmarked. ~ ThriftBooks: Read More, Spend Less.

Hardcover. Zustand: Very Good. No Jacket. May have limited writing in cover pages. Pages are unmarked. ~ ThriftBooks: Read More, Spend Less.

Zustand: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.

Zustand: New. pp. xv + 309 Illus.

gebundene Ausgabe. Zustand: Gut. 225 Seiten; Das hier angebotene Buch stammt aus einer teilaufgelösten wissenschaftlichen Bibliothek und trägt die entsprechenden Kennzeichnungen (Rückenschild, Instituts-Stempel.); Schnitt und Einband sind etwas staubschmutzig; der Buchzustand ist ansonsten ordentlich und dem Alter entsprechend gut. Text in ENGLISCHER Sprache! Sprache: Englisch Gewicht in Gramm: 620.

Paperback. Zustand: Brand New. 1st edition. 336 pages. 9.25x7.50x1.00 inches. In Stock.

Zustand: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.

Zustand: New. pp. 496.

Zustand: New.

Zustand: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.

Paperback. Zustand: Brand New. 2nd edition. 718 pages. 9.00x7.25x2.00 inches. In Stock.

Zustand: New. pp. xiv + 225 Illus.

Zustand: New.

Zustand: Hervorragend. Zustand: Hervorragend | Seiten: 268 | Sprache: Englisch | Produktart: Bücher | High efficiency, large scale, stationary computing systems ¿ supercomputers and data centers ¿ are becoming increasingly important due to the movement of data storage and processing onto remote cloud servers. This book is dedicated to a technology particularly appropriate for this application ¿ superconductive electronics, in particular, rapid single flux quantum circuits. The primary purpose of this book is to introduce and systematize recent developments in superconductive electronics into a cohesive whole to support the further development of large scale computing systems. A brief background into the physics of superconductivity and the operation of common superconductive devices is provided, followed by an introduction into different superconductive logic families, including the logic gates, interconnect, and bias current distribution. Synchronization, fabrication, and electronic design automation methodologies are presented, reviewing both widely established concepts and techniques as well as recent approaches. Issues related to memory, synchronization, bias networks, and testability are described, and models, circuits, algorithms, and design methodologies are discussed and placed in context. The aim of this book is to provide insight and engineering intuition into the design of large scale digital superconductive circuits and systems.

Zustand: Gut. Zustand: Gut | Seiten: 332 | Sprache: Englisch | Produktart: Bücher | The appropriate interconnect model has changed several times over the past two decades due to the application of aggressive technology scaling. New, more accurate interconnect models are required to manage the changing physical characteristics of integrated circuits. Currently, RC models are used to analyze high resistance nets while capacitive models are used for less resistive interconnect. However, on-chip inductance is becoming more important with integrated circuits operating at higher frequencies, since the inductive impedance is proportional to the frequency. The operating frequencies of integrated circuits have increased dramatically over the past decade and are expected to maintain the same rate of increase over the next decade, approaching 10 GHz by the year 2012. Also, wide wires are frequently encountered in important global nets, such as clock distribution networks and in upper metal layers, and performance requirements are pushing the introduction of new materials for low resistance interconnect, such as copper interconnect already used in many commercial CMOS technologies. On-Chip Inductance in High Speed Integrated Circuits deals with the design and analysis of integrated circuits with a specific focus on on-chip inductance effects. It has been described throughout this book that inductance can have a tangible effect on current high speed integrated circuits. For example, neglecting inductance and using an RC interconnect model in a production 0.25 mum CMOS technology can cause large errors (over 35%) in estimates of the propagation delay of on-chip interconnect. It has also been shown that including inductance in the repeater insertion design process as compared to using an RC model improves the overall repeater solution in terms of area, power, and delay with average savings of 40.8%, 15.6%, and 6.7%, respectively. On-Chip Inductance in High Speed Integrated Circuitsis full of design and analysis techniques for RLC interconnect. These techniques are compared to techniques traditionally used for RC interconnect design to emphasize the effect of inductance. On-Chip Inductance in High Speed Integrated Circuits will be of interest to researchers in the area of high frequency interconnect, noise, and high performance integrated circuit design.

Zustand: Gut. Zustand: Gut | Seiten: 332 | Sprache: Englisch | Produktart: Bücher | The appropriate interconnect model has changed several times over the past two decades due to the application of aggressive technology scaling. New, more accurate interconnect models are required to manage the changing physical characteristics of integrated circuits. Currently, RC models are used to analyze high resistance nets while capacitive models are used for less resistive interconnect. However, on-chip inductance is becoming more important with integrated circuits operating at higher frequencies, since the inductive impedance is proportional to the frequency. The operating frequencies of integrated circuits have increased dramatically over the past decade and are expected to maintain the same rate of increase over the next decade, approaching 10 GHz by the year 2012. Also, wide wires are frequently encountered in important global nets, such as clock distribution networks and in upper metal layers, and performance requirements are pushing the introduction of new materials for low resistance interconnect, such as copper interconnect already used in many commercial CMOS technologies. On-Chip Inductance in High Speed Integrated Circuits deals with the design and analysis of integrated circuits with a specific focus on on-chip inductance effects. It has been described throughout this book that inductance can have a tangible effect on current high speed integrated circuits. For example, neglecting inductance and using an RC interconnect model in a production 0.25 mum CMOS technology can cause large errors (over 35%) in estimates of the propagation delay of on-chip interconnect. It has also been shown that including inductance in the repeater insertion design process as compared to using an RC model improves the overall repeater solution in terms of area, power, and delay with average savings of 40.8%, 15.6%, and 6.7%, respectively. On-Chip Inductance in High Speed Integrated Circuitsis full of design and analysis techniques for RLC interconnect. These techniques are compared to techniques traditionally used for RC interconnect design to emphasize the effect of inductance. On-Chip Inductance in High Speed Integrated Circuits will be of interest to researchers in the area of high frequency interconnect, noise, and high performance integrated circuit design.

Zustand: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | History of the Book The last three decades have witnessed an explosive development in integrated circuit fabrication technologies. The complexities of cur­ rent CMOS circuits are reaching beyond the 100 nanometer feature size and multi-hundred million transistors per integrated circuit. To fully exploit this technological potential, circuit designers use sophisticated Computer-Aided Design (CAD) tools. While supporting the talents of innumerable microelectronics engineers, these CAD tools have become the enabling factor responsible for the successful design and implemen­ tation of thousands of high performance, large scale integrated circuits. This research monograph originated from a body of doctoral disserta­ tion research completed by the first author at the University of Rochester from 1994 to 1999 while under the supervision of Prof. Eby G. Friedman. This research focuses on issues in the design of the clock distribution net­ work in large scale, high performance digital synchronous circuits and particularly, on algorithms for non-zero clock skew scheduling. During the development of this research, it has become clear that incorporating timing issues into the successful integrated circuit design process is of fundamental importance, particularly in that advanced theoretical de­ velopments in this area have been slow to reach the designers' desktops.

Gebunden. Zustand: New.

Zustand: New.

Taschenbuch. Zustand: Neu. Neuware -Networks are pervasive. Very large scale integrated (VLSI) systems are no different, consisting of dozens of interconnected subsystems, hundreds of modules, and many billions of transistors and wires. Graph theory is crucial for managing and analyzing these systems. In this book, VLSI system design is discussed from the perspective of graph theory. Starting from theoretical foundations, the authors uncover the link connecting pure mathematics with practical product development. This book not only provides a review of established graph theoretic practices, but also discusses the latest advancements in graph theory driving modern VLSI technologies, covering a wide range of design issues such as synchronization, power network models and analysis, and interconnect routing and synthesis.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 368 pp. Englisch.

Zustand: New. pp. 548 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.