Brayton robert k (48 Ergebnisse)
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Logic Minimization Algorithms for VLSI Synthesis
McMullen, Curtis T., Sangiovanni-Vincentelli, Alberto L., Hachtel, Gary D., Brayton, Robert K.
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Logic Minimization Algorithms for VLSI Synthesis
McMullen, Curtis T., Sangiovanni-Vincentelli, Alberto L., Hachtel, Gary D., Brayton, Robert K.
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Zustand: New. pp. 260 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.
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Sprache: Englisch
Verlag: Springer, 2012
Serie: Buch 149 von 260 - The Springer International Series in Engineering and Computer Science
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Synthesis of Finite State Machines: Logic Optimization
Villa, Tiziano; Kam, Timothy; Brayton, Robert K.; Sangiovanni-Vincentelli, Alberto L.
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Logic Synthesis for Field-Programmable Gate Arrays (The Springer International Series in Engineering and Computer Science, 324)
Murgai, Rajeev; Brayton, Robert K.; Sangiovanni-Vincentelli, Alberto L.
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Logic Synthesis for Field-Programmable Gate Arrays (The Springer International Series in Engineering and Computer Science)
Murgai, Rajeev; Brayton, Robert K.; Sangiovanni-Vincentelli, Alberto L.
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Synthesis of Finite State Machines: Logic Optimization
Villa, Tiziano; Kam, Timothy; Brayton, Robert K.; Sangiovanni-Vincentelli, Alberto L.
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Sprache: Englisch
Verlag: Springer, 1991
Serie: Buch 149 von 260 - The Springer International Series in Engineering and Computer Science
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Synthesis of Finite State Machines : Logic Optimization
Tiziano Villa, Alberto L. Sangiovanni-Vincentelli, Robert K. Brayton, Timothy Kam
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Zustand: Sehr gut. Zustand: Sehr gut | Seiten: 404 | Sprache: Englisch | Produktart: Bücher | Synthesis of Finite State Machines: Logic Optimization is the second in a set of two monographs devoted to the synthesis of Finite State Machines (FSMs). The first volume, Synthesis of Finite State Machines: Functional Optimization, add…resses functional optimization, whereas this one addresses logic optimization. The result of functional optimization is a symbolic description of an FSM which represents a sequential function chosen from a collection of permissible candidates. Logic optimization is the body of techniques for converting a symbolic description of an FSM into a hardware implementation. The mapping of a given symbolic representation into a two-valued logic implementation is called state encoding (or state assignment) and it impacts heavily area, speed, testability and power consumption of the realized circuit. The first part of the book introduces the relevant background, presents results previously scattered in the literature on the computational complexity of encoding problems, and surveys in depth old and new approaches to encoding in logic synthesis. The second part of the book presents two main results about symbolic minimization; a new procedure to find minimal two-level symbolic covers, under face, dominance and disjunctive constraints, and a unified frame to check encodability of encoding constraints and find codes of minimum length that satisfy them. The third part of the book introduces generalized prime implicants (GPIs), which are the counterpart, in symbolic minimization of two-level logic, to prime implicants in two-valued two-level minimization. GPIs enable the design of an exact procedure for two-level symbolic minimization, based on a covering step which is complicated by the need to guarantee encodability of the final cover. A new efficient algorithm to verify encodability of a selected cover is presented. If a cover is not encodable, it is shown how to augment itminimally until an encodable superset of GPIs is determined. To handle encodability the authors have extended the frame to satisfy encoding constraints presented in the second part. The covering problems generated in the minimization of GPIs tend to be very large. Recently large covering problems have been attacked successfully by representing the covering table with binary decision diagrams (BDD). In the fourth part of the book the authors introduce such techniques and extend them to the case of the implicit minimization of GPIs, where the encodability and augmentation steps are also performed implicitly. Synthesis of Finite State Machines: Logic Optimization will be of interest to researchers and professional engineers who work in the area of computer-aided design of integrated circuits.
Synthesis of Finite State Machines: Functional Optimization
Kam, Timothy,Villa, Tiziano,Brayton, Robert K.,Sangiovanni-Vincentelli, Alberto L.
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hardcover. Zustand: Good. Our good condition books are generally good for reading but not for gifting or collecting. They could have imperfections such as creasing, fanning, inscriptions, margin notes, yellowing, staining on edge or cover or pages, bumps, scuffs, etc etc (sometimes multiple of these). It's a wide category that e…ncompasses anything that isn't almost-new down to anything that is slightly better than poor. We would NOT recommend gifting Good books - these should be considered reading copies. Our books are dispatched from a Yorkshire former cotton mill. We list via barcode/ISBN so please note that the images are stock images and may not be the exact copy you receive, furthermore the details about edition and year might not be accurate as many publishers reuse the same ISBN for multiple editions and as we simply scan a barcode or enter an ISBN we do not check the validity of the edition data when listing. If you're looking for an exact edition please don't order (at least not without checking with us first, although we don't always have time to check). We aim to dispatch prompty, the service used will depend on order value and book size. We can ship to most countries, see our shipping policies. Payment is via Abe only.
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Zustand: Gut. Zustand: Gut | Sprache: Englisch | Produktart: Bücher | This book was motivated by the problems being faced with shrinking IC process feature sizes. It is well known that as process feature sizes shrink, a host of electrical problems like cross-talk, electromigration, self-heat, etc. are becoming important. Cross-t…alk is one of the major problems since it results in unpredictable design behavior. In particular, it can result in significant delay variation or signal integrity problems in a wire, depending on the state of its neighboring wires. Typical approaches to tackle the cross-talk problem attempt to fix the problem once it is created. In our approach, we ensure that cross-talk is eliminated by design. The work described in this book attempts to take an "outside-the-box" view and propose a radically different design style. This design style first imposes a fixed layout pattern (or fabric) on the integrated circuit, and then embeds the circuit being implemented into this fabric. The fabric is chosen carefully in order to eliminate the cross-talk problem being faced in modem IC processes. With our choice of fabric, cross-talk between adjacent wires on an IC is reduced by between one and two orders of magnitude. In this way, the fabric concept eliminates cross-talk up-front, and by design. We propose two separate design flows, each of which uses the fabric concept to implement logic. The first flow uses fabric-compliant standard cells as an im plementation vehicle. We call these cells fabric cells, and they have the same logic functionality as existing standard cells with which they are compared.
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Zustand: Sehr gut. Zustand: Sehr gut | Seiten: 260 | Sprache: Englisch | Produktart: Bücher | Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design discusses new approaches to better timing-closure and manufacturability of DSM Integrated Circuits. The key idea presented is the use of regular circuit and interconnect struc…tures such that area/delay can be predicted with high accuracy. The co-design of structures and algorithms allows great opportunities for achieving better final results, thus closing the gap between IC and CAD designers. The regularities also provide simpler and possibly better manufacturability. In this book we present not only algorithms for solving particular sub-problems but also systematic ways of organizing different algorithms in a flow to solve the design problem as a whole. A timing-driven chip design flow is developed based on the new structures and their design algorithms, which produces faster chips in a shorter time.
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Taschenbuch. Zustand: Neu. Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design | Robert K. Brayton (u. a.) | Taschenbuch | xi | Englisch | 2013 | Springer US | EAN 9781475779349 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbi…eter: preigu.
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Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Timing research in high performance VLSI systems has advanced at a steady pace over the last few years, while tools, especially theoretical mechanisms, lag behind. Much present timing research relies heavily on timing diagrams, which, although intuit…ive, are inadequate for analysis of large designs with many parameters. Further, timing diagrams offer only approximations, not exact solutions, to many timing problems and provide little insight in the cases where temporal properties of a design interact intricately with the design's logical functionalities. This book presents a methodology for timing research which facilitates analy sis and design of circuits and systems in a unified temporal and logical domain. In the first part, we introduce an algebraic representation formalism, Timed Boolean Functions (TBF's), which integrates both logical and timing informa tion of digital circuits and systems into a single formalism. We also give a canonical form, TBF BDD's, for them, which can be used for efficient ma nipulation. In the second part, we apply Timed Boolean Functions to three problems in timing research, for which exact solutions are obtained for the first time: 1. computing the exact delays of combinational circuits and the minimum cycle times of finite state machines, 2. analysis and synthesis of wavepipelining circuits, a high speed architecture for which precise timing relations between signals are essential for correct operations, 3. verification of circuit and system performance and coverage of delay faults by testing.
Cross-talk Noise Immune VLSI Design Using Regular Layout Fabrics
Khatri, Sunil P.; Brayton, Robert K.; Sangiovanni-Vincentelli, Alberto
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Zustand: New. Cross-talk is one of the major problems since it results in unpredictable design behavior. It can result in delay variation or signal integrity problems in a wire, depending on the state of its neighboring wire. This book introduces a framework for cross-talk-free IC design. It uses a predetermined layout pattern o…n the IC. Num Pages: 112 pages, biography. BIC Classification: TJF; UY. Category: (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 9. Weight in Grams: 830. . 2001. Hardback. . . . . Books ship from the US and Ireland.
Sprache: Englisch
Verlag: Kluwer Academic Publishers, 1991
Serie: Buch 149 von 260 - The Springer International Series in Engineering and Computer Science
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Zustand: New. Editor(s): McGeer, Patrick C.; Brayton, Robert K. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 212 pages, biography. BIC Classification: T; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 14. Weight in Grams: 1…150. . 1991. Hardback. . . . . Books ship from the US and Ireland.
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Zustand: New. Presents a methodology for timing research which facilitates analysis and design of circuits and systems in a unified temporal and logical domain. This book shows us the central idea of representing logical and timing information in a common structure, TBFs, and to present a canonical form suitable for efficient ma…nipulation. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 273 pages, biography. BIC Classification: TJFC; UY. Category: (P) Professional & Vocational. Dimension: 234 x 156 x 17. Weight in Grams: 597. . 1994. Hardback. . . . . Books ship from the US and Ireland.
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Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design discusses new approaches to better timing-closure and manufacturability of DSM Integrated Circuits. The key idea presented is the use of regular circuit and interconnect structures such tha…t area/delay can be predicted with high accuracy. The co-design of structures and algorithms allows great opportunities for achieving better final results, thus closing the gap between IC and CAD designers. The regularities also provide simpler and possibly better manufacturability. In this book we present not only algorithms for solving particular sub-problems but also systematic ways of organizing different algorithms in a flow to solve the design problem as a whole. A timing-driven chip design flow is developed based on the new structures and their design algorithms, which produces faster chips in a shorter time.
