andrzej strojwas (11 Ergebnisse)

Zustand: Very Good. Most items will be dispatched the same or the next working day. A copy that has been read, but is in excellent condition. Pages are intact and not marred by notes or highlighting. The spine remains undamaged.

Softcover. Zustand: Bon. Ancien livre de bibliothèque. Petite(s) trace(s) de pliure sur la couverture. Légères traces d'usure sur la couverture. Couverture légèrement déchirée. Edition 1987. Ammareal reverse jusqu'à 15% du prix net de cet article à des organisations caritatives. ENGLISH DESCRIPTION Book Condition: Used, Good. Former library book. Slightly creased cover. Slight signs of wear on the cover. Slightly torn cover. Edition 1987. Ammareal gives back up to 15% of this item's net price to charity organizations.

Zustand: Good. Former library book; may include library markings. Used book that is in clean, average condition without any missing pages.

hardcover. Zustand: Very Good. Zustand des Schutzumschlags: No Dust Jacket. First Edition. Hardback in very good condition. Printed boards, a little scuffed; previous owner's name on FEP, no jacket as issued; contents clean, sound, bright. TPW. Used.

Hardcover. Zustand: Très bon. Ancien livre de bibliothèque. Petite(s) trace(s) de pliure sur la couverture. Légères traces d'usure sur la couverture. Salissures sur la tranche. Edition 1990. Ammareal reverse jusqu'à 15% du prix net de cet article à des organisations caritatives. ENGLISH DESCRIPTION Book Condition: Used, Very good. Former library book. Slightly creased cover. Slight signs of wear on the cover. Stains on the edge. Edition 1990. Ammareal gives back up to 15% of this item's net price to charity organizations.

Zustand: Gut. Zustand: Gut | Sprache: Englisch | Produktart: Bücher.

Zustand: New. This text applies concepts developed in the context of delay fault testing to path sensitization, which allows an accurate timing analysis mechanism to be developed. This path sensitization strategy is further applied for efficient delay fault diagnosis and delay fault coverage estimation. Num Pages: 155 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate. Dimension: 234 x 156 x 11. Weight in Grams: 426. . 1997. Hardback. . . . . Books ship from the US and Ireland.

Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Large system complexities and operation under tight timing constraints in rapidly shrinking technologies have made it extremely important to ensure correct temporal behavior of modern-day digital circuits, both before and after fabrication. Research in (pre-fabrication) timing verification and (post-fabrication) delay fault testing has evolved along largely disjoint lines in spite of the fact that they share many basic concepts. A Unified Approach for Timing Verification and Delay Fault Testing applies concepts developed in the context of delay fault testing to path sensitization, which allows an accurate timing analysis mechanism to be developed. This path sensitization strategy is further applied for efficient delay fault diagnosis and delay fault coverage estimation. A new path sensitization strategy called Signal Stabilization Time Analysis (SSTA) has been developed based on the fact that primitive PDFs determine the stabilization time of the circuit outputs. This analysis has been used to develop a feasible method of identifying the primitive PDFs in a general multi-level logic circuit. An approach to determine the maximum circuit delay using this primitive PDF identification mechanism is also presented. The Primitive PDF Identification-based Timing Analysis (PITA) approach is proved to determine the maximum floating mode circuit delay exactly under any component delay model, and provides several advantages over previously floating mode timing analyzers. A framework for the diagnosis of circuit failures caused by distributed path delay faults is also presented. A metric to quantify the diagnosability of a path delay fault for a test is also proposed. Finally, the book presents a very realistic metric for delay fault coverage which accounts for delay fault size distributions and is applicable to any delay fault model. A Unified Approach for Timing Verification and Delay Fault Testing will be of interest to university and industry researchers in timing analysis and delay fault testing as well as EDA tool development engineers and design verification engineers dealing with timing issues in ULSI circuits. The book should also be of interest to digital designers and others interested in knowing the state of the art in timing verification and delay fault testing.

Zustand: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher.

Zustand: New. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 292 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 19. Weight in Grams: 609. . 1989. Hardback. . . . . Books ship from the US and Ireland.

Kluwer, Boston, 1990. XII, 291 pages with some graphics, hardcover, (former library book)--- 750 Gramm.