Leakage in Nanometer CMOS Technologies

Beschreibung

Neuware -Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumption, and in many scaled technologies leakage contributes 30-50% of the overall power consumption under nominal operating conditions. Leakage is important in a variety of different contexts. For example, in desktop applications, active leakage power (i.e., leakage power when the processor is computing) is becoming significant compared to switching power. In battery operated systems, standby leakage (i.e., leakage when the processor clock is turned off) dominates as energy is drawn over long idle periods. Increased transistor leakages not only impact the overall power consumed by a CMOS system, but also reduce the margins available for design due to the strong relationship between process variation and leakage power. It is essential for circuit and system designers to understand the components of leakage, sensitivity of leakage to different design parameters, and leakage mitigation techniques in nanometer technologies. This book provides an in-depth treatment of these issues for researchers and product designers.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 320 pp. Englisch.

Bestandsnummer des Verkäufers 9780387257372

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Bibliografische Details

Titel

Leakage in Nanometer CMOS Technologies

Verlag

Springer US, Springer New York Nov 2005

Erscheinungsjahr

2005

Sprache

Englisch

ISBN-10

0387257373

ISBN-13

9780387257372

Einband

Buch

Zustand

Neu

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