CTL for Test Information of Digital ICS
Kapur, Rohit
Verkauft von Kennys Bookstore, Olney, MD, USA
AbeBooks-Verkäufer seit 9. Oktober 2009
Neu - Hardcover
Zustand: Neu
Anzahl: 15 verfügbar
In den Warenkorb legenVerkauft von Kennys Bookstore, Olney, MD, USA
AbeBooks-Verkäufer seit 9. Oktober 2009
Zustand: Neu
Anzahl: 15 verfügbar
In den Warenkorb legenFrom the reviews: "[!] a welcome addition to the literature. [!] This book promises to make a valuable contribution to the education of graduate students in electrical and computer engineering, and a very useful addition to the library of the maturer investigator in SoC designs or related fields." Microelectronics Reliability Num Pages: 173 pages, biography. BIC Classification: TJFC; TJFD. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate. Dimension: 234 x 156 x 12. Weight in Grams: 444. . 2002. Hardback. . . . . Books ship from the US and Ireland.
Bestandsnummer des Verkäufers V9781402072932
From the reviews: "[...] a welcome addition to the literature. [...] This book promises to make a valuable contribution to the education of graduate students in electrical and computer engineering, and a very useful addition to the library of the maturer investigator in SoC designs or related fields." Microelectronics Reliability
From the reviews:
"The book is a welcome addition to the literature. It is definitely useful as a reference for anyone who is interested in creating test programs for SoC designs. This book promises to make a valuable contribution to the education of graduate students in electrical and computer engineering, and a very useful addition to the library of the maturer investigator in SoC designs or related fields."
(Microelectronics Reliability, 43 (2003)
"CTL for test information of Digital ICs will have significant impact and will be accessible to anyone who is interested in testing integrated circuits. The contents of this book are especially relevant to the segment of the industry that is developing cores and/or using cores in system-on-chip methodologies. The author has done an excellent job. It is a pleasure to read and consult a book that tries to promote understanding, not just coverage. Indeed a stimulating book ... ." (Current Engineering Practice, Vol. 47, 2002-2003)
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