Ten articles reprinted from the Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology vol. 16 (1997) explore advanced aspects of clock signals used to synchronize the movement of data within semiconductor systems. They discuss exploiting the localized nature of clock skew, the implementation of clock distribution networks, and long-range aspects of the next generation of such networks. The specific topics include optimizing clock skew for peak current reductions, buffered clock tree synthesis with non-zero clock skew scheduling for an increased tolerance to process parameter variations, useful-skew clock routing in gate sizing for low-power design, practical bounded-skew clock routing, a clock methodology for high-performance microprocessors, optimal clock distribution in electronic systems, and the timing of multi-gigahertz rapid single-flux quantum digital circuits. No index. Annotation c. by Book News, Inc., Portland, Or.
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