Springer us mai 2009 (2 Ergebnisse)

Buch. Zustand: Neu. Neuware - The current book provides a final report of activity performed by the COST 290 Action, ''Traffic and QoS Management in Wireless Multimedia Networks,'' which ran from March 10, 2004, until June 3, 2008. After an introduction to the COST framework and the Action's survey time-frame and activities, the main part of the book addresses a number of technical issues, which are structured into several chapters. All those issues have been carefully investigated by the COST 290 community during the course of the project - the information presented in this book can be regarded as ultimate for each particular topic; every open research issue addressed in the book is described carefully, corresponding existing studies are analyzed and results achieved by the COST 290 community are presented and compared, and further research directions are defined and analyzed. Because the book covers a wide area of research addressing issues of modern wired and wireless networking at different layers, starting from the physical layer up to the application layer, it can be recommended to be used by researchers and students to obtain a comprehensive analysis on particular research topics including related areas, to obtain broad and ultimate referencing, and to be advised on current open issues. COST 290 is one of the Actions of the European COST Program. Founded in 1971, COST is an intergovernmental framework for European Cooperation in the field of Scientific and Technical Research, allowing the coordination of nationally funded research on a European level.…

Buch. Zustand: Neu. Neuware - iming, timing, timing! That is the main concern of a digital designer charged with designing a semiconductor chip. What is it, how is it T described, and how does one verify it The design team of a large digital design may spend months architecting and iterating the design to achieve the required timing target. Besides functional verification, the t- ing closure is the major milestone which dictates when a chip can be - leased to the semiconductor foundry for fabrication. This book addresses the timing verification using static timing analysis for nanometer designs. The book has originated from many years of our working in the area of timing verification for complex nanometer designs. We have come across many design engineers trying to learn the background and various aspects of static timing analysis. Unfortunately, there is no book currently ava- able that can be used by a working engineer to get acquainted with the - tails of static timing analysis. The chip designers lack a central reference for information on timing, that covers the basics to the advanced timing veri- cation procedures and techniques.…