Vlsi artificial intelligence (56 Ergebnisse)

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Taschenbuch. Zustand: Neu. VLSI for Artificial Intelligence and Neural Networks | Jose G. Delgado-Frias (u. a.) | Taschenbuch | xiii | Englisch | 2012 | Springer | EAN 9781461366713 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. …

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Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Architecture and Hardware Support for AI Processing: VLSI Design of a 3D Highly Parallel MessagePassing Architecture (J.L. Bechennec et al.). Architectural Design of the Rewrite Rule Machine Ensemble (H. Aida et al.). A Dataflow Architecture for AI (J. DelgadoFrias et al.). Machines for Prolog: An Extended Prolog Instruction Set for RISC Processors (A. Krall). A VLSI Engine for Structured Logic Programming (P. Civera et al.). Performance Evaluation of a VLSI Associative Unifier in a WAM Based Environment (P. Civera et al.). Analogue and Pulse Stream Neural Networks: Computational Capabilities of BiologicallyRealistic Analog Processing Elements (C. Fields et al.). Analog VLSI Models of Mean Field Networks (C. Schneider et al.). An Analogue Neuron Suitable for a Data Frame Architecture (W.A.J. Waller et al.). Digital Implementations of Neural Networks: The VLSI Implementation of the sigma Architecture (S.R. Williams et al.). A Cascadable VLSI Architecture for the Realization of Large Binary Associative Networks (W. Poechmueller et al.). Digital VLSI Implementations of an Associative memory Based on Neural Networks (U. Rückert). Arrays for Neural Networks: A Highly Parallel Digital Architecture for Neural Network Emulation (D. Hammerstrom). 26 additional articles. Index.…

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book contains revised and extendedversions of a selection of papers presented at the 31st IFIP WG 10.5/IEEE International Conference on the theme ofVLSI-SoC Innovations for Trustworthy Artificial Intelligence, VLSI-SoC 2023, held in Sharjah, United Arab Emirates,duringOctober 16-18, 2023.The15 full papers included in this volume were carefully revised and expanded from 77 paperssubmitted to the conference. This edited volume has been organized into four parts: architectures; accelerators; resiliency and robustness; and security and privacy - and is representing cutting-edge research at the forefront of VLSI technology. …

Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book contains revised and extendedversions of a selection of papers presented at the 31st IFIP WG 10.5/IEEE International Conference on the theme ofVLSI-SoC Innovations for Trustworthy Artificial Intelligence, VLSI-SoC 2023, held in Sharjah, United Arab Emirates,duringOctober 16-18, 2023.The15 full papers included in this volume were carefully revised and expanded from 77 paperssubmitted to the conference. This edited volume has been organized into four parts: architectures; accelerators; resiliency and robustness; and security and privacy - and is representing cutting-edge research at the forefront of VLSI technology.…

Zustand: New. Editor(s): Delgado-Frias, Jose G.; Moore, Will. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 274 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 17. Weight in Grams: 586. . 1989. Hardback. . . . .…

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Zustand: New. Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ign.

Taschenbuch. Zustand: Neu. VLSI-SoC 2023: Innovations for Trustworthy Artificial Intelligence | 31st IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2023, Sharjah, United Arab Emirates, October 16-18, 2023, Revised Extended Selected Papers | Ibrahim M. Elfadel (u. a.) | Taschenbuch | IFIP Advances in Information and Communication Technology | xii | Englisch | 2025 | Springer | EAN 9783031709494 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.…

Gebunden. Zustand: New. Architecture and Hardware Support for AI Processing: VLSI Design of a 3D Highly Parallel MessagePassing Architecture (J.L. Bechennec et al.). Architectural Design of the Rewrite Rule Machine Ensemble (H. Aida et al.). A Dataflow Architecture for AI (J. Delg.

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Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - 1 Prolog Machines.- 1.1 From Low Level Semantic Description of Prolog to Instruction Set and VLSI Design.- 1.2 A 32 Bit Processor for Compiled Prolog.- 1.3 CARMEL-1: A VLSI Architecture for Flat Concurrent Prolog.- 1.4 VLSI for Parallel Execution of Prolog.- 2 Functional Programming Oriented Architectures.- 2.1 Supporting Functional and Logic Programming Languages through a Data Parallel VLSI Architecture.- 2.2 Translating Declaratively Specified Knowledge and Usage Requirements into a Reconfigurable Machine.- 3 Garbage Collection.- 3.1 VLSI-Appropriate Garbage Collection Support.- 3.2 A Self-timed Circuit for a Prolog Machine.- 4 Content-Addressable Memory.- 4.1 VLSI and Rule-Based Systems.- 4.2 Unify with Active Memory.- 4.3 The Pattern Addressable Memory: Hardware for Associative Processing.- 5 Knowledge Based Systems.- 5.1 A High Performance Relational Algebraic Processor for Large Knowledge Bases.- 5.2 A WSI Semantic Network Architecture.- 6 Neural Architectures.- 6.1 A VLSI Implementation of Multilayered Neural Networks.- 6.2 A Fully Digital Integrated CMOS Hopfield Network Including the Learning Algorithm.- 6.3 A Neural Network for 3-D VLSI Accelerator.- 6.4 Shift Invariant Associative Memory.- 7 Digital and Analog VLSI Neural Networks.- 7.1 VLSI Bit-Serial Neural Networks.- 7.2 A New CMOS Architecture for Neural Networks.- 7.3 A Limited-Interconnect, Highly Layered Synthetic Neural Architecture.- 7.4 VLSI-Design of Associative Networks.- 7.5 Fully-Programmable Analogue VLSI Devices for the Implementation of Neural Networks.- 8 Architectures for Neural Computing.- 8.1 Are Special Chips Necessary for Neural Computing .- 8.2 A VLSI Systolic Array Dedicated to Hopfield Neural Network.- 8.3 An Integrated System for Neural Network Simulations.…

Zustand: New. 1 Prolog Machines.- 1.1 From Low Level Semantic Description of Prolog to Instruction Set and VLSI Design.- 1.2 A 32 Bit Processor for Compiled Prolog.- 1.3 CARMEL-1: A VLSI Architecture for Flat Concurrent Prolog.- 1.4 VLSI for Parallel Execution of Prolog.

Zustand: New. Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ign.

Zustand: New. Editor(s): Delgado-Frias, Jose G.; Moore, Will. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 274 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 17. Weight in Grams: 586. . 1989. Hardback. . . . . Books ship from the US and Ireland.…

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