low power interconnect design von saini sandeep (7 Ergebnisse)

XVII, 152 p. Hardcover. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped. Sprache: Englisch.

Hardcover. Zustand: Brand New. 200 pages. 9.25x6.25x0.75 inches. In Stock.

Taschenbuch. Zustand: Neu. Low Power Interconnect Design | Sandeep Saini | Taschenbuch | xvii | Englisch | 2016 | Springer US | EAN 9781493942947 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.

Buch. Zustand: Neu. Neuware -This book provides practical solutions for delay and power reduction for on-chip interconnects and buses. It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the total system. Coverage focuses on use of the Schmitt Trigger as an alternative approach to buffer insertion for delay and power reduction in VLSI interconnects. In the last section of the book, various bus coding techniques are discussed to minimize delay and power in address and data buses.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 172 pp. Englisch.

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book provides practical solutions for delay and power reduction for on-chip interconnects and buses. It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the total system. Coverage focuses on use of the Schmitt Trigger as an alternative approach to buffer insertion for delay and power reduction in VLSI interconnects. In the last section of the book, various bus coding techniques are discussed to minimize delay and power in address and data buses.

Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book provides practical solutions for delay and power reduction for on-chip interconnects and buses. It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the total system. Coverage focuses on use of the Schmitt Trigger as an alternative approach to buffer insertion for delay and power reduction in VLSI interconnects. In the last section of the book, various bus coding techniques are discussed to minimize delay and power in address and data buses.

Paperback. Zustand: Brand New. reprint edition. 169 pages. 9.25x6.10x0.41 inches. In Stock.