Verlag: Springer International Publishing, Springer International Publishing Jul 2015, 2015
ISBN 10: 3031006208 ISBN 13: 9783031006203
Sprache: Englisch
Anbieter: buchversandmimpf2000, Emtmannsberg, BAYE, Deutschland
EUR 35,30
Währung umrechnenAnzahl: 2 verfügbar
In den WarenkorbTaschenbuch. Zustand: Neu. Neuware -Since the end of Dennard scaling in the early 2000s, improving the energy efficiency of computation has been the main concern of the research community and industry. The large energy efficiency gap between general-purpose processors and application-specific integrated circuits (ASICs) motivates the exploration of customizable architectures, where one can adapt the architecture to the workload. In this Synthesis lecture, we present an overview and introduction of the recent developments on energy-efficient customizable architectures, including customizable cores and accelerators, on-chip memory customization, and interconnect optimization. In addition to a discussion of the general techniques and classification of different approaches used in each area, we also highlight and illustrate some of the most successful design examples in each category and discuss their impact on performance and energy efficiency. We hope that this work captures the state-of-the-art research and development oncustomizable architectures and serves as a useful reference basis for further research, design, and implementation for large-scale deployment in future computing systems.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 120 pp. Englisch.
Verlag: Springer International Publishing, 2015
ISBN 10: 3031006208 ISBN 13: 9783031006203
Sprache: Englisch
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
EUR 35,30
Währung umrechnenAnzahl: 1 verfügbar
In den WarenkorbTaschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Since the end of Dennard scaling in the early 2000s, improving the energy efficiency of computation has been the main concern of the research community and industry. The large energy efficiency gap between general-purpose processors and application-specific integrated circuits (ASICs) motivates the exploration of customizable architectures, where one can adapt the architecture to the workload. In this Synthesis lecture, we present an overview and introduction of the recent developments on energy-efficient customizable architectures, including customizable cores and accelerators, on-chip memory customization, and interconnect optimization. In addition to a discussion of the general techniques and classification of different approaches used in each area, we also highlight and illustrate some of the most successful design examples in each category and discuss their impact on performance and energy efficiency. We hope that this work captures the state-of-the-art research and development oncustomizable architectures and serves as a useful reference basis for further research, design, and implementation for large-scale deployment in future computing systems.
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes Königreich
EUR 38,37
Währung umrechnenAnzahl: Mehr als 20 verfügbar
In den WarenkorbZustand: New. In.