Anbieter: SpringBooks, Berlin, Deutschland
Erstausgabe
Hardcover. Zustand: As New. 1. Auflage. Unread, like new. Immediately dispatched from Germany.
Sprache: Englisch
Verlag: Springer Berlin Heidelberg, 2016
ISBN 10: 366249681X ISBN 13: 9783662496817
Anbieter: moluna, Greven, Deutschland
EUR 48,37
Anzahl: Mehr als 20 verfügbar
In den WarenkorbZustand: New.
Sprache: Englisch
Verlag: Springer Berlin Heidelberg, 2016
ISBN 10: 366249681X ISBN 13: 9783662496817
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book mainly focuses on reducing the high parasitic resistance in the source/drain of germanium nMOSFET. With adopting of the Implantation After Germanide (IAG) technique, P and Sb co-implantation technique and Multiple Implantation and Multiple Annealing (MIMA) technique, the electron Schottky barrier height of NiGe/Ge contact is modulated to 0.1eV, the thermal stability of NiGe is improved to 600 and the contact resistivity of metal/n-Ge contact is drastically reduced to 3.8×10-7 -cm2, respectively. Besides, a reduced source/drain parasitic resistance is demonstrated in the fabricated Ge nMOSFET. Readers will find useful information about the source/drain engineering technique for high-performance CMOS devices at future technology node.
Anbieter: Buchpark, Trebbin, Deutschland
Zustand: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | This book mainly focuses on reducing the high parasitic resistance in the source/drain of germanium nMOSFET. With adopting of the Implantation After Germanide (IAG) technique, P and Sb co-implantation technique and Multiple Implantation and Multiple Annealing (MIMA) technique, the electron Schottky barrier height of NiGe/Ge contact is modulated to 0.1eV, the thermal stability of NiGe is improved to 600¿ and the contact resistivity of metal/n-Ge contact is drastically reduced to 3.8×10¿7¿¿cm2, respectively. Besides, a reduced source/drain parasitic resistance is demonstrated in the fabricated Ge nMOSFET. Readers will find useful information about the source/drain engineering technique for high-performance CMOS devices at future technology node.