9780792397144 - from contamination to defects, faults and yield loss: simulation and applications (frontiers in electronic testing, 5, band 5) von khare, jitendra b.; maly, wojciech (6 Ergebnisse)
Sprache: Englisch
Verlag: Kluwer, 1996
Serie: Frontiers in Electronic Testing, Buch 28 von 40. Buch 28 von 40 - Frontiers in Electronic Testing
- Hardcover
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Zustand: Good. 150 pp., Hardcover, ex library else text clean and binding tight. - If you are reading this, this item is actually (physically) in our stock and ready for shipment once ordered. We are not bookjackers. Buyer is responsible for any additional duties, taxes, or fees required by recipient's country.
Sprache: Englisch
Verlag: Springer, 1996
Serie: Frontiers in Electronic Testing, Buch 28 von 40. Buch 28 von 40 - Frontiers in Electronic Testing
- Hardcover
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Zustand: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.
Sprache: Englisch
Verlag: Springer, 1996
Serie: Frontiers in Electronic Testing, Buch 28 von 40. Buch 28 von 40 - Frontiers in Electronic Testing
- Hardcover
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Zustand: New. In.
Sprache: Englisch
Verlag: Springer US, 1996
Serie: Frontiers in Electronic Testing, Buch 28 von 40. Buch 28 von 40 - Frontiers in Electronic Testing
- Hardcover
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Zustand: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | Over the years there has been a large increase in the functionality available on a single integrated circuit. This has been mainly achieved by a continuous drive towards smaller feature sizes, larger dies, and better packing efficiency. However, this… greater functionality has also resulted in substantial increases in the capital investment needed to build fabrication facilities. Given such a high level of investment, it is critical for IC manufacturers to reduce manufacturing costs and get a better return on their investment. The most obvious method of reducing the manufacturing cost per die is to improve manufacturing yield. Modern VLSI research and engineering (which includes design manufacturing and testing) encompasses a very broad range of disciplines such as chemistry, physics, material science, circuit design, mathematics and computer science. Due to this diversity, the VLSI arena has become fractured into a number of separate sub-domains with little or no interaction between them. This is the case with the relationships between testing and manufacturing. From Contamination to Defects, Faults and Yield Loss: Simulation and Applications focuses on the core of the interface between manufacturing and testing, i.e., the contamination-defect-fault relationship. The understanding of this relationship can lead to better solutions of many manufacturing and testing problems. Failure mechanism models are developed and presented which can be used to accurately estimate probability of different failures for a given IC. This information is critical in solving key yield-related applications such as failure analysis, fault modeling and design manufacturing.
Sprache: Englisch
Verlag: Kluwer Academic Publishers, 1996
Serie: Frontiers in Electronic Testing, Buch 28 von 40. Buch 28 von 40 - Frontiers in Electronic Testing
- Hardcover
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Zustand: New. States that over the years there has been a large increase in the functionality available on a single integrated circuit. This book focuses on the core of the interface between manufacturing and testing, ie, the contamination-defect-fault relationship. Series: Frontiers in Electronic Testing. Num Pages: 166 pages,…biography. BIC Classification: TJFC; TJFD. Category: (P) Professional & Vocational; (XV) Technical / Manuals. Dimension: 234 x 156 x 11. Weight in Grams: 930. . 1996. Hardback. . . . . Books ship from the US and Ireland.
Sprache: Englisch
Verlag: Springer US, Springer US, 1996
Serie: Frontiers in Electronic Testing, Buch 28 von 40. Buch 28 von 40 - Frontiers in Electronic Testing
- Hardcover
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Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Over the years there has been a large increase in the functionality available on a single integrated circuit. This has been mainly achieved by a continuous drive towards smaller feature sizes, larger dies, and better packing efficiency. However, this greate…r functionality has also resulted in substantial increases in the capital investment needed to build fabrication facilities. Given such a high level of investment, it is critical for IC manufacturers to reduce manufacturing costs and get a better return on their investment. The most obvious method of reducing the manufacturing cost per die is to improve manufacturing yield. Modern VLSI research and engineering (which includes design manufacturing and testing) encompasses a very broad range of disciplines such as chemistry, physics, material science, circuit design, mathematics and computer science. Due to this diversity, the VLSI arena has become fractured into a number of separate sub-domains with little or no interaction between them. This is the case with the relationships between testing and manufacturing. From Contamination to Defects, Faults and Yield Loss: Simulation and Applications focuses on the core of the interface between manufacturing and testing, i.e., the contamination-defect-fault relationship. The understanding of this relationship can lead to better solutions of many manufacturing and testing problems. Failure mechanism models are developed and presented which can be used to accurately estimate probability of different failures for a given IC. This information is critical in solving key yield-related applications such as failure analysis, fault modeling and design manufacturing.
