Isbn: 9780792397144 - from contamination to defects, faults and yield loss: simulation and applications (frontiers in electronic testing, 5, band 5) (5 Ergebnisse)

Sprache: Englisch
Verlag: Springer, 1996
- Hardcover
Anbieter: Romtrade Corp., STERLING HEIGHTS, MI, USARomtrade Corp.
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 74,96
Versand gratisVersand innerhalb von USAAnzahl: 1 verfügbar
Zustand: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.

Sprache: Englisch
Verlag: Springer, 1996
- Hardcover
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes KönigreichRia Christie Collections
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 116,42
EUR 13,17 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. In.

Sprache: Englisch
Verlag: Springer US, 1996
- Hardcover
Anbieter: Buchpark, Trebbin, DeutschlandBuchpark
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Gebraucht - Sehr gut
EUR 49,44
EUR 105,00 VersandVersand von Deutschland nach USAAnzahl: 2 verfügbar
Zustand: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | Over the years there has been a large increase in the functionality available on a single integrated circuit. This has been mainly achieved by a continuous drive towards smaller feature sizes, larger dies, and better packing efficiency. However, this greater functionality has also resulted in substantial increases in the capital investment needed to build fabrication facilities. Given such a high level of investment, it is critical for IC manufacturers to reduce manufacturing costs and get a better return on their investment. The most obvious method of reducing the manufacturing cost per die is to improve manufacturing yield. Modern VLSI research and engineering (which includes design manufacturing and testing) encompasses a very broad range of disciplines such as chemistry, physics, material science, circuit design, mathematics and computer science. Due to this diversity, the VLSI arena has become fractured into a number of separate sub-domains with little or no interaction between them. This is the case with the relationships between testing and manufacturing. From Contamination to Defects, Faults and Yield Loss: Simulation and Applications focuses on the core of the interface between manufacturing and testing, i.e., the contamination-defect-fault relationship. The understanding of this relationship can lead to better solutions of many manufacturing and testing problems. Failure mechanism models are developed and presented which can be used to accurately estimate probability of different failures for a given IC. This information is critical in solving key yield-related applications such as failure analysis, fault modeling and design manufacturing.…

Sprache: Englisch
Verlag: Kluwer Academic Publishers, 1996
- Hardcover
Anbieter: Kennys Bookstore, Olney, MD, USAKennys Bookstore
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 165,31
EUR 9,06 VersandVersand innerhalb von USAAnzahl: 15 verfügbar
Zustand: New. States that over the years there has been a large increase in the functionality available on a single integrated circuit. This book focuses on the core of the interface between manufacturing and testing, ie, the contamination-defect-fault relationship. Series: Frontiers in Electronic Testing. Num Pages: 166 pages, biography. BIC Classification: TJFC; TJFD. Category: (P) Professional & Vocational; (XV) Technical / Manuals. Dimension: 234 x 156 x 11. Weight in Grams: 930. . 1996. Hardback. . . . . Books ship from the US and Ireland.…

Sprache: Englisch
Verlag: Springer, 1996
- Hardcover
Anbieter: AHA-BUCH GmbH, Einbeck, DeutschlandAHA-BUCH GmbH
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 150,10
EUR 30,50 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Over the years there has been a large increase in the functionality available on a single integrated circuit. This has been mainly achieved by a continuous drive towards smaller feature sizes, larger dies, and better packing efficiency. However, this greater functionality has also resulted in substantial increases in the capital investment needed to build fabrication facilities. Given such a high level of investment, it is critical for IC manufacturers to reduce manufacturing costs and get a better return on their investment. The most obvious method of reducing the manufacturing cost per die is to improve manufacturing yield. Modern VLSI research and engineering (which includes design manufacturing and testing) encompasses a very broad range of disciplines such as chemistry, physics, material science, circuit design, mathematics and computer science. Due to this diversity, the VLSI arena has become fractured into a number of separate sub-domains with little or no interaction between them. This is the case with the relationships between testing and manufacturing. From Contamination to Defects, Faults and Yield Loss: Simulation and Applications focuses on the core of the interface between manufacturing and testing, i.e., the contamination-defect-fault relationship. The understanding of this relationship can lead to better solutions of many manufacturing and testing problems. Failure mechanism models are developed and presented which can be used to accurately estimate probability of different failures for a given IC. This information is critical in solving key yield-related applications such as failure analysis, fault modeling and design manufacturing.…