9780792382959 - delay fault testing for vlsi circuits (frontiers in electronic testing, band 14) von krstic, angela; kwang-ting (tim) cheng (4 Ergebnisse)
Sprache: Englisch
Verlag: Springer, 1998
Serie: Frontiers in Electronic Testing, Buch 31 von 40. Buch 31 von 40 - Frontiers in Electronic Testing
- Hardcover
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Zustand: New. In.
Sprache: Englisch
Verlag: Springer US, 1998
Serie: Frontiers in Electronic Testing, Buch 31 von 40. Buch 31 von 40 - Frontiers in Electronic Testing
- Hardcover
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Zustand: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor process techno…logy, our expectations on speed have soared. A frequently asked question in the last decade has been how fast can the clock run. This puts significant demands on timing analysis and delay testing. Fueled by the above events, a tremendous growth has occurred in the research on delay testing. Recent work includes fault models, algorithms for test generation and fault simulation, and methods for design and synthesis for testability. The authors of this book, Angela Krstic and Tim Cheng, have personally contributed to this research. Now they do an even greater service to the profession by collecting the work of a large number of researchers. In addition to expounding such a great deal of information, they have delivered it with utmost clarity. To further the reader's understanding many key concepts are illustrated by simple examples. The basic ideas of delay testing have reached a level of maturity that makes them suitable for practice. In that sense, this book is the best x DELAY FAULT TESTING FOR VLSI CIRCUITS available guide for an engineer designing or testing VLSI systems. Tech niques for path delay testing and for use of slower test equipment to test high-speed circuits are of particular interest.
Sprache: Englisch
Verlag: Springer US, Springer US, 1998
Serie: Frontiers in Electronic Testing, Buch 31 von 40. Buch 31 von 40 - Frontiers in Electronic Testing
- Hardcover
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Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor process technology, o…ur expectations on speed have soared. A frequently asked question in the last decade has been how fast can the clock run. This puts significant demands on timing analysis and delay testing. Fueled by the above events, a tremendous growth has occurred in the research on delay testing. Recent work includes fault models, algorithms for test generation and fault simulation, and methods for design and synthesis for testability. The authors of this book, Angela Krstic and Tim Cheng, have personally contributed to this research. Now they do an even greater service to the profession by collecting the work of a large number of researchers. In addition to expounding such a great deal of information, they have delivered it with utmost clarity. To further the reader's understanding many key concepts are illustrated by simple examples. The basic ideas of delay testing have reached a level of maturity that makes them suitable for practice. In that sense, this book is the best x DELAY FAULT TESTING FOR VLSI CIRCUITS available guide for an engineer designing or testing VLSI systems. Tech niques for path delay testing and for use of slower test equipment to test high-speed circuits are of particular interest.
Sprache: Englisch
Verlag: Kluwer Academic Publishers, 1998
Serie: Frontiers in Electronic Testing, Buch 31 von 40. Buch 31 von 40 - Frontiers in Electronic Testing
- Hardcover
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Zustand: New. Presents a selection of existing delay testing research results. This book combines introductory material with techniques that address some of the problems in delay testing. It covers some basic topics such as fault modeling and test application schemes for detecting delay defects. Series: Frontiers in Electronic T…esting. Num Pages: 203 pages, biography. BIC Classification: TJFD; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 12. Weight in Grams: 1050. . 1998. Hardback. . . . . Books ship from the US and Ireland.
