Sprache: Englisch
Verlag: Cambridge University Press, 2005
ISBN 10: 052182866X ISBN 13: 9780521828666
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes Königreich
EUR 67,24
Anzahl: Mehr als 20 verfügbar
In den WarenkorbZustand: New. In.
Sprache: Englisch
Verlag: Cambridge University Press, 2005
ISBN 10: 052182866X ISBN 13: 9780521828666
Anbieter: Kennys Bookstore, Olney, MD, USA
EUR 128,06
Anzahl: Mehr als 20 verfügbar
In den WarenkorbZustand: New. This book explains how to specify, design, and test a complete digital system using Verilog. Num Pages: 176 pages, 5 tables. BIC Classification: TJF; UYD. Category: (P) Professional & Vocational; (U) Tertiary Education (US: College). Dimension: 247 x 174 x 14. Weight in Grams: 530. . 2004. Illustrated. hardcover. . . . . Books ship from the US and Ireland.
Sprache: Englisch
Verlag: Cambridge University Press, 2011
ISBN 10: 052182866X ISBN 13: 9780521828666
Anbieter: Buchpark, Trebbin, Deutschland
Zustand: Gut. Zustand: Gut | Sprache: Englisch | Produktart: Bücher | Using Verilog, a leading commercial hardware description language, this text describes how to specify, design, and test a complete digital system. After a brief introduction to the Verilog language, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined. The remainder of the book demonstrates how both behavioral and structural models can be developed and intermingled in Verilog.
Sprache: Englisch
Verlag: Cambridge University Press, 2005
ISBN 10: 052182866X ISBN 13: 9780521828666
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book serves both as an introduction to computer architecture and as a guide to using a hardware description language (HDL) to design, model and simulate real digital systems. The book starts with an introduction to Verilog - the HDL chosen for the book since it is widely used in industry and straightforward to learn. Next, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined - this is a real working device that has been built and tested at the University of Minnesota by the authors. The VeSPA ISA is used throughout the remainder of the book to demonstrate how behavioural and structural models can be developed and intermingled in Verilog. Although Verilog is used throughout, the lessons learned will be equally applicable to other HDLs. Written for senior and graduate students, this book is also an ideal introduction to Verilog for practising engineers.