yao wen chang (6 Ergebnisse)

Zustand: New. pp. 124 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.

XI, 102 p. Hardcover. Versand aus Deutschland / We dispatch from Germany via Air Mail. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped. Analoge Circuits and Signal Processing Series. Sprache: Englisch.

Zustand: New. pp. xxxv + 934 Illus.

Hardcover. Zustand: Brand New. 1st edition. 972 pages. 9.40x7.40x1.80 inches. In Stock.

Zustand: Gut. Zustand: Gut | Sprache: Englisch | Produktart: Bücher | As Moore's Law continues unencumbered into the nanometer era, chips are reaching 1000 M gates in size, process geometries have shrunk to 90 nm and below, and engineers have to face compounded design complexity with every new design. These nanometer-scale designs require a new generation of physics-aware and manufacturing-aware routing. At 90 nm and below, there are so many signal-integrity issues that design teams cannot manually correct them all. At 90 nm, wires account for nearly 75% of the total delay in a circuit. Even more insidious, however, is that among nearly 40% of these nets, more than 50% of their total net capacitance are attributed to the cross-coupling capacitance between neighboring signals. At this point a new design and optimization paradigm based on real wires is required. Nanometer routers must prevent and correct these effects on-the-fly in order to reach timing closure. From a manufacturability standpoint, nanometer routers must explicitly deal with the ever increasing design complexity, and be capable of adapting to the constraint requirements of timing, signal integrity, process antenna effect, and new interconnect architecture such as X-architecture. In the nanometer era, we must look into new-generation routing technologies that combine high performance and capacity with the integration of congestion, timing, SI prevention, and DFM algorithms as the best means of getting to design closure quickly. In this book, we present a novel multilevel full-chip router, namely mSIGMA for SIGnal-integrity and MAnufacturability optimization. And these routing technologies will ensure faster time-to-market and time-to-profitability.

Softcover. Zustand: g to vg. First edition. Oblong quarto (9 1/2 x 10 1/4"). [4]pp (Title and Introduction); [48]pp (Plates); [2]pp. Original photo-illustrated dust-jacket over blind wrappers. Illustrated with 48 striking photogravures (13 in full color) depicting some of the most spectacular and dizzying views of China, this scarce Spanish-language photo-book* takes us on a journey filled with the richness and diversity of its landscapes and culture. Dust-jacket partly rubbed along edges, with close tear and minor chipping at head of spine. Text in Spanish. Dust-jacket in overall good, wrappers and interior in very good condition. * The book is not in Parr, and OCLC indicates only three libraries worlwide owning it.