Tsai kevin (9 Ergebnisse)

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Weitere BilderThreshold: Byron Kim, 1990-2004 book by Byron Kim, Janine Antoni, Glenn Ligon, Constance Lewallen, Anoka Faruqee, Eugenie Tsai, Kevin Consey
Byron Kim, Janine Antoni, Glenn Ligon, Constance Lewallen, Anoka Faruqee, Eugenie Tsai, Kevin Consey
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Softcover. Zustand: Like New. Immediate dispatch from Somerset. Book in excellent unread/unused condition. Softcover. English. See images for condition. About the book >.>.> I first met Byron Kim in 2000 in Seoul, South Korea. We were there at the Invitation of Artsonije, a contemporary art museum that was presenting, for the first time in Korea, an exhibition that featured Korean American artists. Titled "Koreamericakorea," it included works by Kim and by the late Theresa Hak Kyung Cha, whose film/video projection Exil?e, a meditation on cultural displacement, was on loan from the Berkeley Art Museum and Pacific Film Archive and served as a touchstone for the exhibition. However, I had already been an admirer of Kim's work for some years, after seeing his unforgettable painting Synecdoche, 1991 (fig. 2), for the first time in the 1993 Whitney Biennial. Synecdoche is a grid of hundreds of small panels, each a different shade, ranging from light tan or pink to dark brown. Was this a riff on Minimal painting? I wondered. Well, as it turned out, yes and no. Upon reading the wall text, I learned that Kim had matched each panel to the color of a person's skin. Each modular unit, then, is in essence a portra.…

Sprache: Englisch
Verlag: University of California, Berkeley Art Museum, 2004
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Paperback. Zustand: Good. No Jacket. Pages can have notes/highlighting. Spine may show signs of wear. ~ ThriftBooks: Read More, Spend Less.

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Zustand: Sehr gut. Zustand: Sehr gut | Seiten: 380 | Sprache: Englisch | Produktart: Bücher | The purpose of this book is to introduce VHSIC Hardware Description Lan guage (VHDL) and its use for synthesis. VHDL is a hardware description language which provides a means of specifying a digital system over different levels of abstraction. It supports behavior specification during the early stages of a design process and structural specification during the later implementation stages. VHDL was originally introduced as a hardware description language that per mitted the simulation of digital designs. It is now increasingly used for design specifications that are given as the input to synthesis tools which translate the specifications into netlists from which the physical systems can be built. One problem with this use of VHDL is that not all of its constructs are useful in synthesis. The specification of delay in signal assignments does not have a clear meaning in synthesis, where delays have already been determined by the im plementationtechnolo~y. VHDL has data-structures such as files and pointers, useful for simulation purposes but not for actual synthesis. As a result synthe sis tools accept only subsets of VHDL. This book tries to cover the synthesis aspect of VHDL, while keeping the simulation-specifics to a minimum. This book is suitable for working professionals as well as for graduate or under graduate study. Readers can view this book as a way to get acquainted with VHDL and how it can be used in modeling of digital designs.…

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Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - The purpose of this book is to introduce VHSIC Hardware Description Lan guage (VHDL) and its use for synthesis. VHDL is a hardware description language which provides a means of specifying a digital system over different levels of abstraction. It supports behavior specification during the early stages of a design process and structural specification during the later implementation stages. VHDL was originally introduced as a hardware description language that per mitted the simulation of digital designs. It is now increasingly used for design specifications that are given as the input to synthesis tools which translate the specifications into netlists from which the physical systems can be built. One problem with this use of VHDL is that not all of its constructs are useful in synthesis. The specification of delay in signal assignments does not have a clear meaning in synthesis, where delays have already been determined by the im plementationtechnolo~y. VHDL has data-structures such as files and pointers, useful for simulation purposes but not for actual synthesis. As a result synthe sis tools accept only subsets of VHDL. This book tries to cover the synthesis aspect of VHDL, while keeping the simulation-specifics to a minimum. This book is suitable for working professionals as well as for graduate or under graduate study. Readers can view this book as a way to get acquainted with VHDL and how it can be used in modeling of digital designs.…