herdt vladimir (13 Ergebnisse)

Paperback. Zustand: Brand New. 184 pages. 8.25x5.75x0.75 inches. In Stock.

Taschenbuch. Zustand: Neu. Neuware -In hismaster thesis, Vladimir Herdt presents a novel approach, called completesymbolic simulation, for a more efficient verification ofmuch larger (non-terminating) SystemC programs. Theapproach combines symbolic simulation with stateful model checking and allowsto verify safety properties in (cyclic) finite state spaces, by exhaustiveexploration of all possible inputs and process schedulings. The state explosionproblem is alleviated by integrating two complementary reduction techniques. Comparedto existing approaches, the complete symbolic simulation works more efficientlyand therefore can provide correctness proofs for larger systems, which is oneof the most challenging tasks, due to the ever increasing complexity.Springer Vieweg in Springer Science + Business Media, Abraham-Lincoln-Straße 46, 65189 Wiesbaden 184 pp. Englisch.

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - In hismaster thesis, Vladimir Herdt presents a novel approach, called completesymbolic simulation, for a more efficient verification ofmuch larger (non-terminating) SystemC programs. Theapproach combines symbolic simulation with stateful model checking and allowsto verify safety properties in (cyclic) finite state spaces, by exhaustiveexploration of all possible inputs and process schedulings. The state explosionproblem is alleviated by integrating two complementary reduction techniques. Comparedto existing approaches, the complete symbolic simulation works more efficiently,and therefore can provide correctness proofs for larger systems, which is oneof the most challenging tasks, due to the ever increasing complexity.

Zustand: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | Keine Beschreibung verfügbar.

Taschenbuch. Zustand: Neu. Enhanced Virtual Prototyping | Featuring RISC-V Case Studies | Vladimir Herdt (u. a.) | Taschenbuch | xxi | Englisch | 2021 | Springer International Publishing | EAN 9783030548308 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.

Taschenbuch. Zustand: Neu. Neuware -This book presents a comprehensive set of techniques that enhance all key aspects of a modern Virtual Prototype (VP)-based design flow. The authors emphasize automated formal verification methods, as well as advanced coverage-guided analysis and testing techniques, tailored for SystemC-based VPs and also the associated Software (SW). Coverage also includes VP modeling techniques that handle functional as well as non-functional aspects and also describes correspondence analyses between the Hardware- and VP-level to utilize information available at different levels of abstraction. All approaches are discussed in detail and are evaluated extensively, using several experiments to demonstrate their effectiveness in enhancing the VP-based design flow. Furthermore, the book puts a particular focus on the modern RISC-V ISA, with several case-studies covering modeling as well as VP and SW verification aspects.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 272 pp. Englisch.

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book presents a comprehensive set of techniques that enhance all key aspects of a modern Virtual Prototype (VP)-based design flow. The authors emphasize automated formal verification methods, as well as advanced coverage-guided analysis and testing techniques, tailored for SystemC-based VPs and also the associated Software (SW). Coverage also includes VP modeling techniques that handle functional as well as non-functional aspects and also describes correspondence analyses between the Hardware- and VP-level to utilize information available at different levels of abstraction. All approaches are discussed in detail and are evaluated extensively, using several experiments to demonstrate their effectiveness in enhancing the VP-based design flow. Furthermore, the book puts a particular focus on the modern RISC-V ISA, with several case-studies covering modeling as well as VP and SW verification aspects.

Buch. Zustand: Neu. Neuware -This book presents a comprehensive set of techniques that enhance all key aspects of a modern Virtual Prototype (VP)-based design flow. The authors emphasize automated formal verification methods, as well as advanced coverage-guided analysis and testing techniques, tailored for SystemC-based VPs and also the associated Software (SW). Coverage also includes VP modeling techniques that handle functional as well as non-functional aspects and also describes correspondence analyses between the Hardware- and VP-level to utilize information available at different levels of abstraction. All approaches are discussed in detail and are evaluated extensively, using several experiments to demonstrate their effectiveness in enhancing the VP-based design flow. Furthermore, the book puts a particular focus on the modern RISC-V ISA, with several case-studies covering modeling as well as VP and SW verification aspects.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 272 pp. Englisch.

Hardcover. Zustand: Brand New. 268 pages. 9.25x6.10x0.63 inches. In Stock.

Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book presents a comprehensive set of techniques that enhance all key aspects of a modern Virtual Prototype (VP)-based design flow. The authors emphasize automated formal verification methods, as well as advanced coverage-guided analysis and testing techniques, tailored for SystemC-based VPs and also the associated Software (SW). Coverage also includes VP modeling techniques that handle functional as well as non-functional aspects and also describes correspondence analyses between the Hardware- and VP-level to utilize information available at different levels of abstraction. All approaches are discussed in detail and are evaluated extensively, using several experiments to demonstrate their effectiveness in enhancing the VP-based design flow. Furthermore, the book puts a particular focus on the modern RISC-V ISA, with several case-studies covering modeling as well as VP and SW verification aspects.

Hardcover. Zustand: Brand New. 286 pages. German language. 9.25x6.10x0.75 inches. In Stock.

Buch. Zustand: Neu. Neuware -Dieses Buch stellt eine umfassende Reihe von Techniken vor, die alle wichtigen Aspekte eines modernen Virtual Prototype (VP)-basierten Entwurfsablaufs verbessern. Die Autoren legen den Schwerpunkt auf automatisierte formale Verifikationsmethoden sowie auf fortgeschrittene, abdeckungsgeleitete Analyse- und Testtechniken, die auf SystemC-basierte VP und die zugehörige Software (SW) zugeschnitten sind. Die Abdeckung umfasst auch VP-Modellierungstechniken, die sowohl funktionale als auch nicht-funktionale Aspekte behandeln, und beschreibt zudem Korrespondenzanalysen zwischen der Hardware- und VP-Ebene, um die auf verschiedenen Abstraktionsebenen verfügbaren Informationen zu nutzen. Alle Ansätze werden ausführlich diskutiert und anhand mehrerer Experimente evaluiert, um ihre Effektivität bei der Verbesserung des VP-basierten Entwurfsablaufs zu demonstrieren. Darüber hinaus legt das Buch einen besonderen Schwerpunkt auf den modernen RISC-V ISA, mit mehreren Fallstudien, die sowohl Aspekteder Modellierung als auch der VP- und SW-Verifikation abdecken.Springer Vieweg in Springer Science + Business Media, Abraham-Lincoln-Straße 46, 65189 Wiesbaden 288 pp. Deutsch.

Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Dieses Buch stellt eine umfassende Reihe von Techniken vor, die alle wichtigen Aspekte eines modernen Virtual Prototype (VP)-basierten Entwurfsablaufs verbessern. Die Autoren legen den Schwerpunkt auf automatisierte formale Verifikationsmethoden sowie auf fortgeschrittene, abdeckungsgeleitete Analyse- und Testtechniken, die auf SystemC-basierte VP und die zugehörige Software (SW) zugeschnitten sind. Die Abdeckung umfasst auch VP-Modellierungstechniken, die sowohl funktionale als auch nicht-funktionale Aspekte behandeln, und beschreibt zudem Korrespondenzanalysen zwischen der Hardware- und VP-Ebene, um die auf verschiedenen Abstraktionsebenen verfügbaren Informationen zu nutzen. Alle Ansätze werden ausführlich diskutiert und anhand mehrerer Experimente evaluiert, um ihre Effektivität bei der Verbesserung des VP-basierten Entwurfsablaufs zu demonstrieren. Darüber hinaus legt das Buch einen besonderen Schwerpunkt auf den modernen RISC-V ISA, mit mehreren Fallstudien, die sowohl Aspekteder Modellierung als auch der VP- und SW-Verifikation abdecken.