frederic mallet (20 Ergebnisse)

Softcover. Zustand: Very Good. 1st thus. Quarto Size [approx 24cm x 30.5cm]. Very Good condition - Card Covers. Illustrated with Colour and Black & White Photographs and Plates. Text in English and French 217 pages. An international exhibition of contemporary art produced to celebrate the 50th anniversary of the World Health Organization.

Paperback. Zustand: Brand New. 456 pages. 9.25x6.10x1.03 inches. In Stock.

Zustand: New.

Paperback. Zustand: Brand New. 152 pages. 9.25x6.10x0.35 inches. In Stock.

Taschenbuch. Zustand: Neu. Neuware -This book constitutes the refereed proceedings of the 7th International Workshop on Formal Techniques for Safety-Critical Systems, FTSCS 2019, held in Shenzhen, China, in November 2019.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 152 pp. Englisch.

Taschenbuch. Zustand: Neu. Neuware -This book contains extended versions of the best papers presented at the 15th International Conference on Information and Communication Technologies in Education, Research, and Industrial Applications, ICTERI 2019, held in Kherson, Ukraine, in June 2019.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 456 pp. Englisch.

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book constitutes the refereed proceedings of the 7th International Workshop on Formal Techniques for Safety-Critical Systems, FTSCS 2019, held in Shenzhen, China,in November 2019.The 6 revised full papers presented were carefully reviewed and selected from 17 submissions. Additionally, the volume presents 1 invited paper, 1 tool paper, and 1 work in progrerss. The papers are focused on the topics of the use of formal methods for analyzing safety-critical systems;methods, techniques and tools to support automated analysis, certication, debugging, etc., of complex safety/QoS-critical systems; analysis methods that address the limitations of formal methods in industry (usability, scalability, etc.); formal analysis support for modeling languages used in industry;code generation from validated models.

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book contains extended versions of the best papers presented at the 15th International Conference on Information and Communication Technologies in Education, Research, and Industrial Applications, ICTERI 2019, held in Kherson, Ukraine, in June 2019.The 19 revised full papers included in this volume were carefully reviewed and selected from 416 initial submissions. The papers are organized in the following topical sections: advances in ICT and IS research; ICT in teaching, learning, and education management; applications of ICT in industrial and public practice.

Taschenbuch. Zustand: Neu. Neuware -Logical time is a relaxed form of time promoted by synchronous languages that is functional, elastic (can be abstracted or refined), and multiform. All these properties make logical time adequate also at design time, whereas precise physical time annotations should only matter in later post-synthesis stages. The Clock Constraint Specification Language (CCSL) is a concrete language dedicated to the modeling and analysis of logical time properties. CCSL was initially defined as a companion for the time model of the UML profile for MARTE. It has now become a full-fledged domain-specific modeling language for capturing causal, chronological and timed relationships. It should complement other syntactic models to capture their underlying model of computation. This book starts by describing the historical models of concurrency that have inspired the construction of CCSL. Then, CCSL is introduced and used to build libraries dedicated to two emerging standard models from the automotive (East-ADL) and the avionic (AADL) domains. Finally, an observer-based technique to verify Esterel and VHDL implementations against CCSL specifications is presented.Books on Demand GmbH, Überseering 33, 22297 Hamburg 124 pp. Englisch.

Zustand: Hervorragend. Zustand: Hervorragend | Sprache: Englisch | Produktart: Bücher | Keine Beschreibung verfügbar.

Taschenbuch. Zustand: Neu. Neuware -El tiempo lógico es una forma relajada de tiempo promovida por lenguajes sincrónicos que es funcional, elástica (puede ser abstraída o refinada) y multiforme. Todas estas propiedades hacen que el tiempo lógico sea adecuado también en el tiempo de diseño, mientras que las anotaciones precisas de tiempo físico sólo deberían importar en las etapas posteriores a la síntesis. El Lenguaje de Especificación de Restricciones del Reloj (CCSL) es un lenguaje concreto dedicado a la modelización y análisis de las propiedades del tiempo lógico. El CCSL se definió inicialmente como un compañero para el modelo de tiempo del perfil UML para MARTE. Ahora se ha convertido en un lenguaje de modelado de dominio específico para capturar relaciones causales, cronológicas y temporales. Debe complementar otros modelos sintácticos para capturar su modelo de cálculo subyacente. Este libro comienza describiendo los modelos históricos de concurrencia que han inspirado la construcción de CCSL. Luego, CCSL se introduce y se utiliza para construir bibliotecas dedicadas a dos modelos estándar emergentes de los dominios automotriz (East-ADL) y aviónico (AADL). Por último, se presenta una técnica basada en la observación para verificar las implementaciones de Esterel y VHDL con respecto a las especificaciones del CCSL.Books on Demand GmbH, Überseering 33, 22297 Hamburg 116 pp. Spanisch.

Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book constitutes the proceedings of the 20th International Conference on Information and Communication Technologies in Education, Research, and Industrial Applications, ICTERI 2025, held in Nice, France, during September 2025.

Zustand: New.

Zustand: good. Befriedigend/Good: Durchschnittlich erhaltenes Buch bzw. Schutzumschlag mit Gebrauchsspuren, aber vollständigen Seiten. / Describes the average WORN book or dust jacket that has all the pages present.

Taschenbuch. Zustand: Neu. Neuware -Logische tijd is een ontspannen vorm van tijd die wordt bevorderd door synchrone talen die functioneel, elastisch (kan worden geabstraheerd of verfijnd) en veelvormig zijn. Al deze eigenschappen maken de logische tijd ook in de ontwerptijd adequaat, terwijl precieze fysieke tijdsaantekeningen alleen in latere na-synthesestadia van belang zouden moeten zijn. De Clock Constraint Specification Language (CCSL) is een concrete taal gewijd aan het modelleren en analyseren van logische tijdseigenschappen. CCSL werd in eerste instantie gedefinieerd als een begeleider van het tijdsmodel van het UML-profiel voor MARTE. Het is nu een volwaardige domeinspecifieke modelleertaal geworden voor het vastleggen van causale, chronologische en tijdsgebonden relaties. Het zou een aanvulling moeten zijn op andere syntactische modellen om hun onderliggende rekenmodel vast te leggen. Dit boek begint met het beschrijven van de historische modellen van gelijktijdigheid die de bouw van CCSL hebben geïnspireerd. Vervolgens wordt CCSL geïntroduceerd en gebruikt om bibliotheken te bouwen die gewijd zijn aan twee opkomende standaardmodellen uit de automotive (East-ADL) en de avionic (AADL) domeinen. Tot slot wordt een op waarnemers gebaseerde techniek gepresenteerd om Esterel- en VHDL-implementaties te verifiëren aan de hand van CCSL-specificaties.Books on Demand GmbH, Überseering 33, 22297 Hamburg 116 pp. Niederländisch.

Zustand: Sehr gut. FUMAT, Carole (illustrator). Zustand: Sehr gut | Seiten: 1040 | Sprache: Französisch | Produktart: Bücher | Keine Beschreibung verfügbar.

Taschenbuch. Zustand: Neu. Neuware -Il tempo logico è una forma di tempo rilassata promossa dai linguaggi sincroni che è funzionale, elastico (può essere astratto o raffinato) e multiforme. Tutte queste proprietà rendono il tempo logico adeguato anche al momento della progettazione, mentre le annotazioni precise del tempo fisico dovrebbero avere importanza solo nelle fasi successive della post-sintesi. Il Clock Constraint Specification Language (CCSL) è un linguaggio concreto dedicato alla modellazione e all'analisi delle proprietà del tempo logico. Il CCSL è stato inizialmente definito come un compagno per il modello temporale del profilo UML per MARTE. Ora è diventato un vero e proprio linguaggio di modellazione specifico del dominio per l'acquisizione di relazioni causali, cronologiche e temporali. Dovrebbe completare altri modelli sintattici per catturare il loro modello di calcolo sottostante. Questo libro inizia con la descrizione dei modelli storici della concomitanza che hanno ispirato la costruzione del CCSL. Poi, il CCSL viene introdotto e utilizzato per costruire librerie dedicate a due modelli standard emergenti del settore automobilistico (East-ADL) e dell'avionica (AADL). Infine, viene presentata una tecnica basata sull'osservazione per verificare le implementazioni Esterel e VHDL rispetto alle specifiche CCSL.Books on Demand GmbH, Überseering 33, 22297 Hamburg 112 pp. Italienisch.

Taschenbuch. Zustand: Neu. Neuware -O tempo lógico é uma forma relaxada de tempo promovida por linguagens síncronas que é funcional, elástica (pode ser abstraída ou refinada), e multiforme. Todas estas propriedades tornam o tempo lógico adequado também no tempo de concepção, enquanto que as anotações de tempo físico precisas só devem ter importância em fases posteriores de pós-síntese. A Clock Constraint Specification Language (CCSL) é uma linguagem concreta dedicada à modelação e análise das propriedades lógicas do tempo. A CCSL foi inicialmente definida como uma companheira para o modelo temporal do perfil UML para a MARTE. Tornou-se agora uma linguagem de modelação de domínio específico para a captura de relações causais, cronológicas e temporais. Deve complementar outros modelos sintácticos para captar o seu modelo de cálculo subjacente. Este livro começa por descrever os modelos históricos de concurrência que inspiraram a construção do CCSL. Em seguida, o CCSL é introduzido e utilizado para construir bibliotecas dedicadas a dois modelos padrão emergentes dos domínios automóvel (East-ADL) e aviónico (AADL). Finalmente, é apresentada uma técnica baseada em observadores para verificar as implementações de Esterel e VHDL em relação às especificações CCSL.Books on Demand GmbH, Überseering 33, 22297 Hamburg 116 pp. Portugiesisch.

Taschenbuch. Zustand: Neu. Neuware VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 116 pp. Deutsch.

Partem primam (allt som utkom). Stockholm, Grefing 1752, (2),30 sidor. Liten 4:o. Tagen ur band. Skuren. [#220681].