Allstot david (14 Ergebnisse)

Zustand: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.

Zustand: New. pp. 184 Illus.

Zustand: New. In English.

Zustand: New. In English.

Paperback. Zustand: Brand New. spi rep edition. 179 pages. 9.26x6.11x0.39 inches. In Stock.

Taschenbuch. Zustand: Neu. Parasitic-Aware Optimization of CMOS RF Circuits | David J. Allstot (u. a.) | Taschenbuch | xvii | Englisch | 2013 | Springer | EAN 9781475777543 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. …

Zustand: New. In the arena of parasitic-aware design of CMOS RF circuits, efforts are aimed at the realization of true single-chip radios with few, if any, off-chip components. This book describes the parasitic-aware RF circuit synthesis techniques that address critical problems in this field. Num Pages: 179 pages, 28 black & white illustrations, biography. BIC Classification: TJFC; U. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 235 x 155 x 12. Weight in Grams: 439. . 2003. 2003rd Edition. hardcover. . . . . Books ship from the US and Ireland.…

Zustand: New. In English.

Zustand: New. In English.

Gebunden. Zustand: New. List of Figures. List of Tables. Preface. 1. Introduction. 2. Sources of Noise and Methods of Coupling. 3. Semiconductor Device Simulation. 4. Simplified Substrate Modeling and Rapid Simulation. 5. Mesh Generation. 6. Substrate Modeling in Heavily-Doped.

Hardcover. Zustand: Brand New. 1995 edition. 304 pages. 9.75x6.50x0.75 inches. In Stock.

Zustand: New. This text addresses two major issues of the mixed-signal coupling problem - how to simulate it and how to overcome it. It identifies some of the problems that will be encountered, gives examples of actual hardware experiences, offers simulation techniques and suggests possible solutions. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 280 pages, biography. BIC Classification: TJFC; TJFD. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 235 x 155 x 22. Weight in Grams: 625. . 1994. Hardback. . . . . Books ship from the US and Ireland.…

Buch. Zustand: Neu. Neuware - 1 Introduction.- 2 Sources of Noise and Methods of Coupling.- 2.1 Semiconductor Device Noise and Phenomena.- 2.2 Noise from Switching Voltage and Current.- 2.3 Inductive Coupling.- 2.4 Capacitive Coupling.- 2.5 Substrate Coupling.- 2.6 Summary.- 3 Semiconductor Device Simulation.- 3.1 Significance.- 3.2 Basic Equations.- 3.3 Boundary Conditions.- 3.4 Models of Physical Parameters.- 3.5 Spatial Discretization.- 3.6 Solution Methods.- 3.7 A Representative Example.- 3.8 Summary.- 4 Simplified Substrate Modeling and Rapid Simulation.- 4.1 Simplified Equation.- 4.2 Spatial Discretization.- 4.3 Boundary Conditions.- 4.4 Solution Methods.- 4.5 Asymptotic Waveform Evaluation (AWE).- 4.6 Substrate AWE Macromodels.- 4.7 Transient Simulation of AWE Macromodels.- 4.8 Substrate DC Macromodels.- 4.9 Matrix Solution.- 4.10 Results.- 4.11 Summary.- 5 Mesh Generation.- 5.1 Adaptive Mesh Refinement.- 5.2 A Priori Mesh Refinement.- 5.3 Summary.- 6 Substrate Modeling in Heavily-Doped Bulk Processes.- 6.1 Motivation.- 6.2 Single Node Substrate Model.- 6.3 Modified Single Node Substrate Model.- 6.4 Summary.- 7 Substrate Resistance Extraction for Large Circuits.- 7.1 Nested Macromodeling.- 7.2 Interpolated Macromodeling.- 7.3 Summary.- 8 Modeling Chip/Package Power Distribution.- 8.1 Effect of Power Bus Structure on Noise coupling.- 8.2 Summary.- 9 Controlling Substrate Coupling in Heavily-Doped Bulk Processes.- 9.1 Characterization of noise coupling concepts.- 9.2 P+ Bulk Wafer Characterization.- 9.3 Effect of Substrate contact placement on coupled noise.- 9.4 Effect of Package Inductance on Substrate noise.- 9.5 Noise Coupling Control Techniques.- 9.6 Summary.- 10 Controlling Substrate Coupling in Bulk P- Wafers.- 10.1 Bulk P- Wafer Characteristics.- 10.2 Substrate Attenuation Structures.-10.3 Summary.- 11 Chip/Package Shielding and Good Circuit Design Practice.- 11.1 Far Field Radiated Emissions.- 11.2 Effect of Chip Signal Isolation/Shielding Techniques on Noise.- 11.3 Effect of Packaging on Noise.- 11.4 Effect of Card Layout and Referencing on Noise.- 11.5 Effect of Circuit Topology on Noise.- 11.6 Summary.- 12 A Design Example.- 12.1 Design of a Mixed-Signal IC.- 12.2 Summary.- Appendices.- A Mesh Moments.- B Convergence Behaviour of Iterative Methods.…

Kluwer, Boston, 1995. XXII, 280 pages with some graphics, hardcover----former library book in good condition- 536 Gramm.