The book presents the Verilog language with a variety of examples to provide a firm foundation in the design of the digital system using Verilog HDL. It places emphasis on the detailed design of various Verilog projects that include the design module, test bench module, and outputs from the simulator illustrating th

�ber die Autorin bzw. den Autor

Joseph Cavanagh received his Bachelor of Science in Electrical Engineering from Indiana Institute of Technology and his Master of Science from Santa Clara University. He spent twenty-two years teaching in the Department of Computer Engineering at Santa Clara University. Prior to that, he taught in the Computer Engineering Department at San Jose State University. Currently, he is an Associate Professor in the Department of Electrical Engineering at Cogswell Polytechnical College, where he has been for the past twelve years. Additionally, he has over two decades of experience designing computing equipment―including arithmetic processors, instruction fetch units, and peripheral control units―for such companies as International Business Corporation, Amdahl Corporation, and Digital Equipment Corporation. Joseph Cavanagh is a member of IEEE, IEEE Computer Society, Tau Beta Pi, and the author of six publications.

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