Low Power Fault Tolerant Latches and Flip-flops

Beschreibung

Neuware -Today, the latches and flip-flops are widely used for data storage. This book focus on review, study and design of fault tolerant circuits to reduce circuit level faults and protect a circuit from faults. In this book, eight novel low power fault tolerant latches and four glitch free flip-flops are discussed. The latch configurations are designed with the 1P-2N structure and 2P-1N structure or 1P-2N structure, 2P-1N structure and C-element structure. If any transient fault affects one of the structure, then it is corrected by the other structure. The glitch free dual edge triggered flip flops are the novel and unique designs. Till now, existing DET-FF designs are constructed by using either C-element circuit or 1P-2N structure or 2P-1N structure but proposed novel designs are designed by using the combination of C-element circuit and 2P-1N structure or C-element circuit and 1P-2N structure. The glitch free novel DET-FFs provide the totally glitch free output and can increase the system efficiency. The potential novelty of this work is that the presented novel designs can reduce the 50% power consumption and contribute to the total system power savings.Books on Demand GmbH, Überseering 33, 22297 Hamburg 152 pp. Englisch.

Bestandsnummer des Verkäufers 9786139453023

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Bibliografische Details

Titel

Low Power Fault Tolerant Latches and Flip-flops

Verlag

LAP LAMBERT Academic Publishing Feb 2019

Erscheinungsjahr

2019

Sprache

Englisch

ISBN-10

613945302X

ISBN-13

9786139453023

Einband

Taschenbuch

Zustand

Neu

Abmessungen

220B x 150 H x 10 T Millimeter Breite: 220 mm, Höhe: 150 mm, Tiefe: 10 mm

Gewicht

244 Gramm

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