Logic Synthesis for Low Power VLSI Designs

Beschreibung

Neuware -Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synthesis and optimization at the logic level. Logic Synthesis for Low Power VLSI Designs contains detailed descriptions of technology-dependent logic transformations and optimizations, technology decomposition and mapping, and post-mapping structural optimization techniques for low power. It also emphasizes the trade-off techniques for two-level and multi-level logic circuits that involve power dissipation and circuit speed, in the hope that the readers can better understand the issues and ways of achieving their power dissipation goal while meeting the timing constraints.Logic Synthesis for Low Power VLSI Designs is written for VLSI design engineers, CAD professionals, and students who have had a basic knowledge of CMOS digital design and logic synthesis.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 256 pp. Englisch.

Bestandsnummer des Verkäufers 9780792380764

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Bibliografische Details

Titel

Logic Synthesis for Low Power VLSI Designs

Verlag

Springer US, Springer New York Nov 1997

Erscheinungsjahr

1997

Sprache

Englisch

ISBN-10

0792380762

ISBN-13

9780792380764

Einband

Buch

Zustand

Neu

Abmessungen

241B x 160 H x 20 T Millimeter Breite: 241 mm, Höhe: 160 mm, Tiefe: 20 mm

Gewicht

551 Gramm

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