High-Level Power Analysis and Optimization
Raghunathan, Anand; Jha, Niraj K.; Dey, Sujit
ISBN 10: 1461374812 ISBN 13: 9781461374817
Verlag: Springer, 2012
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Softcover
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High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level.
High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power.
High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies.
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Titel: High-Level Power Analysis and Optimization
Verlag: Springer
Erscheinungsdatum: 2012
Einband: Softcover
Zustand: New
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High-Level Power Analysis and Optimization
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Taschenbuch. Zustand: Neu. High-Level Power Analysis and Optimization | Anand Raghunathan (u. a.) | Taschenbuch | xix | Englisch | 2012 | Springer | EAN 9781461374817 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. Artikel-Nr. 105997364
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Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level. High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power. High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies. Artikel-Nr. 9781461374817
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