This book describes a new design approach for energy-efficient, Domain-Specific Instruction set Processor (DSIP) architectures used in the wireless baseband domain. Shows how to reduce development costs and increase scalability. Includes case studies. Num Pages: 311 pages, 12 black & white tables, biography. BIC Classification: TJF; TJFC; UYF. Category: (P) Professional & Vocational. Dimension: 235 x 155 x 17. Weight in Grams: 480. . 2015. Paperback. . . . . Books ship from the US and Ireland.

Bestandsnummer des Verk�ufers V9781489994882

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Bibliografische Details

Titel: Energy-Efficient Communication Processors
Verlag: Springer-Verlag New York Inc.
Erscheinungsjahr: 2015
Sprache: Englisch
ISBN-10: 1489994882
ISBN-13: 9781489994882
Einband: Softcover
Zustand: New

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This book describes a new design approach for energy-efficient, Domain-Specific Instruction set Processor (DSIP) architectures for the wireless baseband domain. The innovative techniques presented enable co-design of algorithms, architectures and technology, for efficient implementation of the most advanced technologies. To demonstrate the feasibility of the author’s design approach, case studies are included for crucial functionality of advanced wireless systems with increased computational performance, flexibility and reusability. Designers using this approach will benefit from reduced development/product costs and greater scalability to future process technology nodes.

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This book describes a new design approach for energy-efficient, Domain-Specific Instruction set Processor (DSIP) architectures for the wireless baseband domain. The innovative techniques presented enable co-design of algorithms, architectures and technology, for efficient implementation of the most advanced technologies. To demonstrate the feasibility of the author s design approach, case studies are included for crucial functionality of advanced wireless systems with increased computational performance, flexibility and reusability. Designers using this approach will benefit from reduced development/product costs and greater scalability to future process technology nodes.

Describes a DSIP architecture explicitly for the wireless domain, significantly more efficient than methods commonly in use;
Includes an efficient DSIP architecture template, which can be reused for specific designs;
Uses holistic design approach, considering all relevant requirements and combining many innovative/disruptive design concepts;
Enables design portability, given changing target devices.

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