This book explores the synergy between very large-scale integration (VLSI) and machine learning (ML) and its applications across various domains. It investigates how ML techniques can enhance the design and testing of VLSI circuits, improve power efficiency, optimize layouts, and enable novel architectures. This book bridges the gap between VLSI and ML, showcasing the potential of this integration in creating innovative electronic systems, advancing computing capabilities, and paving the way for a new era of intelligent devices and technologies. Additionally, it covers how VLSI technologies can accelerate ML algorithms, enabling more efficient and powerful data processing and inference engines. It explores both hardware and software aspects, covering topics like hardware accelerators, custom hardware for specific ML tasks, and ML-driven optimization techniques for chip design and testing. This book will be helpful for academicians, researchers, postgraduate students, and those working in ML-driven VLSI.
Dr. Abhishek Narayan Tripathi is currently an Assistant Professor in the Department of Micro and Nanoelectronics, School of Electronics Engineering, Vellore Institute of Technology, Vellore, Tamil Nadu, India. He holds a Ph.D. in ECE with a specialization in VLSI Design and Embedded Technology from MANIT, Bhopal. His research work includes the development of methodologies for dynamic power and leakage power estimation in FPGA and ASIC‑based implementations, VLSI system design, AI, deep learning, and microprocessor architecture.
Dr. Jagana Bihari Padhy is an Assistant Professor in the Department of Embedded Technology, School of Electronics Engineering, Vellore Institute of Technology, Vellore, Tamil Nadu, India. He holds a Ph.D. in ECE with a specialization in optical wireless system design from IIIT Bhubaneswar. His research work includes the development of optical system design both in wired and wireless methodologies for the next generation of communication 5G and beyond.
Dr. Indrasen Singh is an Assistant Professor (Sr. Grade‑2) in the Department of Embedded Technology, School of Electronics Engineering, Vellore Institute of Technology, Vellore, Tamil Nadu, India. His research interests are in the areas of cooperative communication, stochastic geometry, modelling of wireless networks, heterogeneous networks, millimetre wave communications, device‑to‑device communication, and 5G/6G communication.
Dr. Shubham Tayal is an Assistant Professor in the Department of Electronics and Communication Engineering, SR University, Warangal, India. He has more than 6 years of academic/research experience in teaching at the UG and PG levels. He received his Ph.D. in Microelectronics and VLSI Design from the National Institute of Technology, Kurukshetra; M.Tech. (VLSI Design) from YMCA University of Science and Technology, Faridabad; and B.Tech. (Electronics and Communication Engineering) from MDU, Rohtak. His research interests include simulation and modelling of multi‑gate semiconductor devices, device‑circuit co‑design in digital/analogue domain, ML, and Internet of Things.
Prof. Ghanshyam Singh received a Ph.D. degree in Electronics Engineering from the Indian Institute of Technology, Banaras Hindu University, Varanasi, India, in 2000. At present, he is a full Professor with the Department of Electrical and Electronics Engineering, APK Campus, University of Johannesburg, South Africa. His research and teaching interests include RF/microwave engineering, millimetre/THz wave antennas and their applications in communication and imaging, next‑generation communication systems (OFDM and cognitive radio), and nanophotonics. He has more than 19 years of teaching and research experience in electromagnetic/microwave engineering, wireless communication, and nanophotonics.
