The paper describes a new architecture for implementation of 8 X 8 FDCT (Fast Discrete Cosine Transform) using Distributed Arithmetic (DA). This proposed architecture combines both DA based approaches for distributed input vector and constant coefficients. The described Combined Distributed Arithmetic based DCT (CDA-DCT) architecture has been implemented on Virtex II FPGA, and shows fewer adders and saving exceeding 97% achieved.
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Swapan Kumar Samaddar is a Senior Associate in Genpact India, Kolkata. He did BTech (CSE) from Netaji Subhash Engineering College, Kolkata and later on did his ME (CSE) from West Bengal University of Technology, Kolkata. His research areas are Digital Signal Processing, Image Processing, Advanced computer architecture and parallel architecture.
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Taschenbuch. Zustand: Neu. Implementation of FDCT Algorithm Using Distributed Arithmetic | Swapan Kumar Samaddar (u. a.) | Taschenbuch | 136 S. | Englisch | 2013 | LAP LAMBERT Academic Publishing | EAN 9783659377815 | Verantwortliche Person für die EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod[dot]de | Anbieter: preigu. Artikel-Nr. 105922455
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