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Architecture of Computing Systems - ARCS 2012: 25th International Conference, Munich, Germany, February 28 - March 2, 2012. Proceedings (Lecture Notes in Computer Science, Band 7179) - Softcover

 
9783642282928: Architecture of Computing Systems - ARCS 2012: 25th International Conference, Munich, Germany, February 28 - March 2, 2012. Proceedings (Lecture Notes in Computer Science, Band 7179)

Inhaltsangabe

This book constitutes the refereed proceedings of the 25th International Conference on Architecture of Computing Systems, ARCS 2012, held in Munich, Germany, in February/March 2012. The 20 revised full papers presented in 7 technical sessions were carefully reviewed and selected from 65 submissions. The papers are organized in topical sections on robustness and fault tolerance, power-aware processing, parallel processing, processor cores, optimization, and communication and memory.

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Über die Autorinnen und Autoren

Kay Römer is currently a senior researcher and lecturer at ETH Zurich (Switzerland). He received his Ph.D. in computer science from ETH with a thesis on sensor networks. Kay holds a master's degree in computer science from the University of Frankfurt/Main, Germany. His research interests encompass sensor networks, software infrastructures for ubiquitous computing, and middleware for distributed systems.

Uwe Brinkschulte ist seit 1. April 1995 Professor für Mikrorechnertechnologien in der Automatisierung am Institut für Prozessrechentechnik, Automation und Robotik der Universität Karlsruhe. Uwe Brinkschulte ist Autor und Co-Autor zahlreicher Veröffentlichungen im Bereich hardwarenaher Echtzeitsysteme. Er liest in regelmäßigem Turnus die Grundlagenvorlesung Technische Informatik sowie Vertiefungsvorlesungen über Mikrorechner und Mikrocontroller an der Universität Karlsruhe.

Von der hinteren Coverseite

This book constitutes the refereed proceedings of the 25th International Conference on Architecture of Computing Systems, ARCS 2012, held in Munich, Germany, in February/March 2012.

The 20 revised full papers presented in 7 technical sessions were carefully reviewed and selected from 65 submissions. The papers are organized in topical sections on robustness and fault tolerance, power-aware processing, parallel processing, processor cores, optimization, and communication and memory.

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