This book constitutes the refereed proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010, held in Pisa, Italy, in January 2010. The 23 revised full papers presented together with the abstracts of 2 invited keynote addresses were carefully reviewed and selected from 94 submissions. The papers are organized in topical sections on architectural support for concurrency; compilation and runtime systems; reconfigurable and customized architectures; multicore efficiency, reliability, and power; memory organization and optimization; and programming and analysis of accelerators.
Die Inhaltsangabe kann sich auf eine andere Ausgabe dieses Titels beziehen.
This book constitutes the refereed proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010, held in Pisa, Italy, in January 2010.
The 23 revised full papers presented together with the abstracts of 2 invited keynote addresses were carefully reviewed and selected from 94 submissions. The papers are organized in topical sections on architectural support for concurrency; compilation and runtime systems; reconfigurable and customized architectures; multicore efficiency, reliability, and power; memory organization and optimization; and programming and analysis of accelerators.
„Über diesen Titel“ kann sich auf eine andere Ausgabe dieses Titels beziehen.
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Taschenbuch. Zustand: Neu. High Performance Embedded Architectures and Compilers | 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010, Proceedings | Yale N. Patt (u. a.) | Taschenbuch | xiii | Englisch | 2010 | Springer, Berlin | EAN 9783642115141 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. Artikel-Nr. 101377912
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Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book constitutes the refereed proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010, held in Pisa, Italy, in January 2010. The 23 revised full papers presented together with the abstracts of 2 invited keynote addresses were carefully reviewed and selected from 94 submissions. The papers are organized in topical sections on architectural support for concurrency; compilation and runtime systems; reconfigurable and customized architectures; multicore efficiency, reliability, and power; memory organization and optimization; and programming and analysis of accelerators. Artikel-Nr. 9783642115141
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Zustand: Sehr gut. Zustand: Sehr gut | Seiten: 369 | Sprache: Englisch | Produktart: Bücher | Keine Beschreibung verfügbar. Artikel-Nr. 6267165/12
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