Analog IC Placement Generation via Neural Networks from Unlabeled Data (SpringerBriefs in Applied Sciences and Technology) - Softcover

Buch 92 von 322: SpringerBriefs in Applied Sciences and Technology

Gusmão, António; Horta, Nuno; Lourenço, Nuno; Martins, Ricardo

 
9783030500603: Analog IC Placement Generation via Neural Networks from Unlabeled Data (SpringerBriefs in Applied Sciences and Technology)

Inhaltsangabe

In this book, innovative research using artificial neural networks (ANNs) is conducted to automate the placement task in analog integrated circuit layout design, by creating a generalized model that can generate valid layouts at push-button speed. Further, it exploits ANNs’ generalization and push-button speed prediction (once fully trained) capabilities, and details the optimal description of the input/output data relation. The description developed here is chiefly reflected in two of the system’s characteristics: the shape of the input data and the minimized loss function. In order to address the latter, abstract and segmented descriptions of both the input data and the objective behavior are developed, which allow the model to identify, in newer scenarios, sub-blocks which can be found in the input data. This approach yields device-level descriptions of the input topology that, for each device, focus on describing its relation to every other device in the topology. By means of thesedescriptions, an unfamiliar overall topology can be broken down into devices that are subject to the same constraints as a device in one of the training topologies.

In the experimental results chapter, the trained ANNs are used to produce a variety of valid placement solutions even beyond the scope of the training/validation sets, demonstrating the model’s effectiveness in terms of identifying common components between newer topologies and reutilizing the acquired knowledge. Lastly, the methodology used can readily adapt to the given problem’s context (high label production cost), resulting in an efficient, inexpensive and fast model.                           

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Über die Autorin bzw. den Autor

Charlotte y Peter Fiell son dos autoridades en historia, teoría y crítica del diseño y han escrito más de sesenta libros sobre la materia, muchos de los cuales se han convertido en éxitos de ventas. También han impartido conferencias y cursos como profesores invitados, han comisariado exposiciones y asesorado a fabricantes, museos, salas de subastas y grandes coleccionistas privados de todo el mundo. Los Fiell han escrito numerosos libros para TASCHEN, entre los que se incluyen 1000 Chairs, Diseño del siglo XX, El diseño industrial de la A a la Z, Scandinavian Design y Diseño del siglo XXI.

Von der hinteren Coverseite

In this book, innovative research using artificial neural networks (ANNs) is conducted to automate the placement task in analog integrated circuit layout design, by creating a generalized model that can generate valid layouts at push-button speed. Further, it exploits ANNs’ generalization and push-button speed prediction (once fully trained) capabilities, and details the optimal description of the input/output data relation. The description developed here is chiefly reflected in two of the system’s characteristics: the shape of the input data and the minimized loss function. In order to address the latter, abstract and segmented descriptions of both the input data and the objective behavior are developed, which allow the model to identify, in newer scenarios, sub-blocks which can be found in the input data. This approach yields device-level descriptions of the input topology that, for each device, focus on describing its relation to every other device in the topology. By means of these descriptions, an unfamiliar overall topology can be broken down into devices that are subject to the same constraints as a device in one of the training topologies.

In the experimental results chapter, the trained ANNs are used to produce a variety of valid placement solutions even beyond the scope of the training/validation sets, demonstrating the model’s effectiveness in terms of identifying common components between newer topologies and reutilizing the acquired knowledge. Lastly, the methodology used can readily adapt to the given problem’s context (high label production cost), resulting in an efficient, inexpensive and fast model.      

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