Design for High Performance, Low Power, and Reliable 3D Integrated Circuits

0 durchschnittliche Bewertung
( 0 Bewertungen bei GoodReads )
 
9781441995414: Design for High Performance, Low Power, and Reliable 3D Integrated Circuits
Vom Verlag:

This book provides readers with a variety of algorithms and software tools, dedicated to the physical design of through-silicon-via (TSV) based, three-dimensional integrated circuits. It describes numerous "manufacturing-ready" GDSII-level layouts of TSV-based 3D ICs developed with the tools covered in the book. This book will also feature sign-off level analysis of timing, power, signal integrity, and thermal analysis for 3D IC designs. Full details of the related algorithms will be provided so that the readers will be able not only to grasp the core mechanics of the physical design tools, but also to be able to reproduce and improve upon the results themselves. This book will also offer various design-for-manufacturability (DFM), design-for-reliability (DFR), and design-for-testability (DFT) techniques that are considered critical to the physical design process.

Klappentext:

This book describes the design of through-silicon-via (TSV) based three-dimensional integrated circuits.  It includes details of numerous “manufacturing-ready” GDSII-level layouts of TSV-based 3D ICs, developed with tools covered in the book. Readers will benefit from the sign-off level analysis of timing, power, signal integrity, and thermo-mechanical reliability for 3D IC designs.  Coverage also includes various design-for-manufacturability (DFM), design-for-reliability (DFR), and design-for-testability (DFT) techniques that are considered critical to the 3D IC design process.

  • Describes design issues and solutions for high performance and low power 3D ICs, such as the pros/cons of regular and irregular placement of TSVs, Steiner routing, buffer insertion, low power 3D clock routing, power delivery network design and clock design for pre-bond testability.
  • Discusses topics in design-for-electrical-reliability for 3D ICs, such as TSV-to-TSV coupling, current crowding at the wire-to-TSV junction and the electro-migration failure mechanisms in TSVs.
  • Covers design-for-thermal-reliability in 3D ICs, including thermal-aware architectural floorplanning, gate-level placement techniques to alleviate thermal problems, and co-design and co-analysis of thermal, power delivery, and performance.
  • Includes issues affecting design-for-mechanical-reliability in 3D ICs, such as the co-efficient of thermal expansion (CTE) mismatch between TSV and silicon substrate, device mobility and full-chip timing variations, and the impact of package elements.

„Über diesen Titel“ kann sich auf eine andere Ausgabe dieses Titels beziehen.

Gebraucht kaufen Angebot ansehen

Versand: EUR 9,95
Von Deutschland nach USA

Versandziele, Kosten & Dauer

In den Warenkorb

Beste Suchergebnisse beim ZVAB

1.

Lim, Sung Kyu
Verlag: New York, Springer New York, 2013. (2013)
ISBN 10: 1441995412 ISBN 13: 9781441995414
Gebraucht Hardcover Anzahl: 1
Anbieter
Bewertung
[?]

Buchbeschreibung New York, Springer New York, 2013., 2013. XXVIII, 560 p. 235 mm x 155 mm. Hardcover. Versand aus Deutschland / We dispatch from Germany via Air Mail. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped. Stamped. Artikel-Nr. 4236IB

Weitere Informationen zu diesem Verkäufer | Frage an den Anbieter

Gebraucht kaufen
EUR 44,00
Währung umrechnen

In den Warenkorb

Versand: EUR 9,95
Von Deutschland nach USA
Versandziele, Kosten & Dauer