xv From the Old to the New xvii Acknowledgments xxi 1 Verilog - A Tutorial Introduction 1 Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 11 Behavioral Modeling of Combinational Circuits Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 14 Procedural Modeling of Clocked Sequential Circuits Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("
Die Inhaltsangabe kann sich auf eine andere Ausgabe dieses Titels beziehen.
xv From the Old to the New xvii Acknowledgments xxi 1 Verilog – A Tutorial Introduction 1 Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 11 Behavioral Modeling of Combinational Circuits Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 14 Procedural Modeling of Clocked Sequential Circuits Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("
This text presents the IEEE 1364-2001 standard of the Verilog language. The examples in this edition have been updated to illustrate the features of the language. A cross referenced guide to these features is provided, thus, designers already familiar with Verilog can quickly learn the features. Newcomers to the language can use it as a guide for reading "old" specifications. The book should prove to be a useful resource for engineers and students interested in describing, simulating and synthesizing digital systems. It is also ready for use in university courses, having been used for introductory logic design and simulation through advanced VLSI design courses. An appendix with tutorial help and a work-along style is keyed into the introduction for new students. Material supporting a computer-aided design course on the inner working of simulators is also included. "The Verilog TM Hardware Description Language" includes a CD containing Simucad's Silos TM 2001 Verilog Simulator, examples from the book and lecture slides. The simulator is limited in the size of descriptions it will simulate. A few of the language constructs are not recognized by this version of the simulator.
„Über diesen Titel“ kann sich auf eine andere Ausgabe dieses Titels beziehen.
Gratis für den Versand innerhalb von/der USA
Versandziele, Kosten & DauerEUR 63,52 für den Versand von Deutschland nach USA
Versandziele, Kosten & DauerAnbieter: BooksRun, Philadelphia, PA, USA
Hardcover. Zustand: Fair. 5th. The item might be beaten up but readable. May contain markings or highlighting, as well as stains, bent corners, or any other major defect, but the text is not obscured in any way. Artikel-Nr. 1402070896-7-1-13
Anzahl: 1 verfügbar
Anbieter: Better World Books Ltd, Dunfermline, Vereinigtes Königreich
Zustand: Very Good. Ships from the UK. Former library book; may include library markings. Used book that is in excellent condition. May show signs of wear or have minor defects. Artikel-Nr. GRP91143746
Anzahl: 1 verfügbar
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Buch. Zustand: Neu. Neuware - xv From the Old to the New xvii Acknowledgments xxi 1 Verilog - A Tutorial Introduction 1 Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 11 Behavioral Modeling of Combinational Circuits Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 14 Procedural Modeling of Clocked Sequential Circuits Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ('. Artikel-Nr. 9781402070891
Anzahl: 2 verfügbar