Hook line: Discover how memory width, processor count, and running time shape the limits of parallel computation.
The book examines theoretical models of parallel machines, focusing on how input access, shared memory, and write rules affect performance. It explains new lower-bound techniques and shows how tight bounds emerge for different PRAM variants. The discussion links abstract results to practical ideas about hardware feasibility and scalable parallel design.
Readers will gain a clear view of why certain problems resist fast parallel solutions, and how researchers prove what cannot be done quickly. The material is presented with definitions, proofs, and implications that illuminate both theory and potential real-world impact.
Ideal for readers of theoretical computer science, parallel computing, and algorithm design seeking a rigorous, accessible treatment of depth-width trade-offs.
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Anbieter: PBShop.store US, Wood Dale, IL, USA
PAP. Zustand: New. New Book. Shipped from UK. Established seller since 2000. Artikel-Nr. LW-9781333344283
Anbieter: PBShop.store UK, Fairford, GLOS, Vereinigtes Königreich
PAP. Zustand: New. New Book. Shipped from UK. Established seller since 2000. Artikel-Nr. LW-9781333344283
Anzahl: 15 verfügbar