Simulation and Analysis of Different Switch Architectures for Interconnection Networks in MIMD Shared Memory Machines (Classic Reprint) - Softcover

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Excerpt from Simulation and Analysis of Different Switch Architectures for Interconnection Networks in MIMD Shared Memory Machines

Switches can be classified according to the presence or absence of buffers, and accord ing to the location of the buffers. These variations cause differences in performance, for the same cycle time and data path width. The illustrations below show switches, for simplicity.

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