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Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog - Hardcover
Inhaltsangabe
Explaining how you can write Verilog to describe chip designs at the RT-level in a manner that co-operates with verification processes, this text focuses on how this co-operation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labour costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer. It also orients the RTL style to provide more useful results from the overall verification process.
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Reseña del editor
Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog explains how you can write Verilog to describe chip designs at the RT-level in a manner that cooperates with verification processes. This cooperation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labor costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer. It also orients the RTL style to provide more useful results from the overall verification process.
The intended audience for Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog is engineers and students who need an introduction to various design verification processes and a supporting functional Verilog RTL coding style. A second intended audience is engineers who have been through introductory training in Verilog and now want to develop good RTL writing practices for verification. A third audience is Verilog language instructors who are using a general text on Verilog as the course textbook but want to enrich their lectures with an emphasis on verification. A fourth audience is engineers with substantial Verilog experience who want to improve their Verilog practice to work better with RTL Verilog verification tools. A fifth audience is design consultants searching for proven verification-centric methodologies. A sixth audience is EDA verification tool implementers who want some suggestions about a minimal Verilog verification subset.
Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog is based on the reality that comes from actual large-scale product design process and tool experience.
Reseña del editor
Explaining how you can write Verilog to describe chip designs at the RT-level in a manner that co-operates with verification processes, this text focuses on how this co-operation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labour costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer. It also orients the RTL style to provide more useful results from the overall verification process.
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Principles of Verifiable Rtl Design: A Functional Coding Style Supporting Verification Processes in Verilog
Verlag:
Kluwer Academic Publishers, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
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Principles of Verifiable RTL Design - A Functional Coding Style Supporting Verification Processes
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Hardcover. Zustand: Very Good. No Jacket. May have limited writing in cover pages. Pages are unmarked. ~ ThriftBooks: Read More, Spend Less 0.35. Artikel-Nr. G0792377885I4N00
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Principles of Verifiable RTL Design : A Functional Coding Style Supporting Verification Processes in Verilog
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Principles of Verifiable RTL Design : A Functional Coding Style Supporting Verification Processes in Verilog
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Principles of Verifiable RTL Design : A Functional Coding Style Supporting Verification Processes in Verilog
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Zustand: Very Good. 1st Edition. Former library book; may include library markings. Used book that is in excellent condition. May show signs of wear or have minor defects. Artikel-Nr. 17306750-6
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Principles of Verifiable Rtl Design: A Functional Coding Style Supporting Verification Processes in Verilog
Verlag:
Kluwer Academic Publishers, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
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Hardcover
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Zustand: Good. Kluwer Academic Publishers, 2000. Cover very barely rubbed, top spine end/bottom corners bumped; fore-edge very barely soiled; binding tight; cover, edges, and interior intact and very clean; a nice copy. hardcover. Good. Artikel-Nr. 594941
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Beispielbild für diese ISBN
Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog
Verlag:
Kluwer Academic Publishers, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
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Hardcover
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Zustand: Good. This is an ex-library book and may have the usual library/used-book markings inside.This book has hardback covers. In good all round condition. No dust jacket. Please note the Image in this listing is a stock photo and may not match the covers of the actual item,650grams, ISBN:9780792377887. Artikel-Nr. 5834192
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