The increasing interest in formal verification of hardware is witnessed by academic and industrial research efforts, multinational research projects and conferences. These proceedings contain the papers presented at the Workshop held in Turin, Italy from 12-14 June, 1991. Papers focus on the practical impact of formal techniques in VLSI design and verification, semantics for hardware description languages, proof environments and methodologies. Preliminary results of the ESPRIT Basic Research Action 3216 CHARME are discussed. Finite State Machines and their verification, semantics for hardware description languages, proof environments and methodologies, as well as examples of verified circuits and Design for Verifiability are also presented.
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