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Self-Checking and Fault-Tolerant Digital Design (The Morgan Kaufmann Series in Computer Architecture and Design) - Hardcover

 
9780124343702: Self-Checking and Fault-Tolerant Digital Design (The Morgan Kaufmann Series in Computer Architecture and Design)

Inhaltsangabe

With VLSI chip transistors getting smaller and smaller, today's digital systems are more complex than ever before. This increased complexity leads to more cross-talk, noise, and other sources of transient errors during normal operation. Traditional off-line testing strategies cannot guarantee detection of these transient faults. And with critical applications relying on faster, more powerful chips, fault-tolerant, self-checking mechanisms must be built in to assure reliable operation. Self-Checking and Fault-Tolerant Digital Design deals extensively with self-checking design techniques and is the only book that emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance along with the practical techniques used to create fault-tolerant systems.

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Über die Autorin bzw. den Autor

The author is currently a Professor in the Department of Electrical Engineering at North Carolina A&T State University. He is the author of more than 75 papers, and three books published by Prentice Hall. His research interests include design for testability, self-checking logic design, automatic logic synthesis of low power logic circuits, andCPLD/FPGA based system design. He received a M.S. from King's College, London, and a Ph.D. from the City University of London.

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With VLSI chip transistors getting smaller and smaller, today's digital systems are more complex than ever before. This increased complexity leads to more cross-talk, noise, and other sources of transient errors during normal operation. Traditional off-line testing strategies cannot guarantee detection of these transient faults. And with critical applications relying on faster, more powerful chips, fault-tolerant, self-checking mechanisms must be built in to assure reliable operation.


Self-Checking and Fault-Tolerant Digital Design deals extensively with self-checking design techniques and is the only book that emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance along with the practical techniques used to create fault-tolerant systems.


Features:

  • Introduces reliability theory and the importance of maintainability
  • Presents coding and the construction of several error detecting and correcting codes
  • Discusses in depth, the available techniques for fail-safe design of combinational circuits
  • Details checker design techniques for detecting erroneous bits and encoding output of self-checking circuits
  • Demonstrates how to design self-checking sequential circuits, including a technique for fail-safe state machine design

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  • VerlagMorgan Kaufmann Publishers Inc.
  • Erscheinungsdatum2000
  • ISBN 10 0124343708
  • ISBN 13 9780124343702
  • EinbandTapa dura
  • SpracheEnglisch
  • Anzahl der Seiten232
  • Kontakt zum HerstellerNicht verfügbar

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Parag K. Lala
Verlag: Morgan Kaufmann, 2000
ISBN 10: 0124343708 ISBN 13: 9780124343702
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Zustand: Como nuevo. : Este libro trata sobre las técnicas de diseño de autocomprobación y enfatiza las principales técnicas para la tolerancia a fallos de hardware. Los estudiantes de posgrado en cursos de diseño VLSI, así como los diseñadores en ejercicio, apreciarán este tratamiento equilibrado de los conceptos y la teoría subyacentes a la tolerancia a fallos junto con las técnicas prácticas utilizadas para crear sistemas tolerantes a fallos. Introduce la teoría de la fiabilidad y la importancia del mantenimiento, presenta la codificación y la construcción de varios códigos de detección y corrección de errores, analiza en profundidad las técnicas disponibles para el diseño a prueba de fallos de circuitos combinacionales, detalla las técnicas de diseño de comprobadores para detectar bits erróneos y codificar la salida de circuitos de autocomprobación y demuestra cómo diseñar circuitos secuenciales de autocomprobación, incluida una técnica para el diseño de máquinas de estados a prueba de fallos. EAN: 9780124343702 Tipo: Libros Categoría: Tecnología Título: Self-Checking and Fault-Tolerant Digital Design Autor: Parag K. Lala Editorial: Morgan Kaufmann Publishers Inc. Idioma: en Páginas: 232 Formato: tapa dura. Artikel-Nr. Happ-2025-02-04-b1faae79

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