Guide to RISC Processors: For Programmers and Engineers - Hardcover

9780387210179: Guide to RISC Processors: For Programmers and Engineers
Alle Exemplare der Ausgabe mit dieser ISBN anzeigen:
 
 
GUIDE TO RISC PROCESSORS: FOR PROGRAMMERS AND ENGINEERS BY DANDAMUDI,S.P. ET.AL, 9780387210179

Die Inhaltsangabe kann sich auf eine andere Ausgabe dieses Titels beziehen.

Reseña del editor:
Details RISC design principles as well as explains the differences between this and other designs.
Helps readers acquire hands-on assembly language programming experience
Contraportada:

Recently, there has been a trend toward processor design based on the RISC (Reduced Instruction Set Computer) model: Example RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intel’s 64-bit processor Itanium.

This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM, and Itanium. Initial chapters explain the differences between the CISC and RISC designs and clearly discuss the core RISC design principles. The text then integrates instruction on MIPS assembly language programming, thereby enabling readers to concretely grasp concepts and principles introduced earlier. Readers need only have a basic knowledge of any structured, high-level language to obtain the full benefits here.

Features:

*Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience

*Presents material in a manner suitable for flexible self-study

· Assembly language programs permit reader executables using the SPIM simulator

· Integrates core concepts to processor designs and their implementations

· Supplies extensive and complete programming examples and figures

· Contains chapter-by-chapter overviews and summaries

* Provides source code for the MIPS language at the book’s website

Guide to RISC Processors provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as the all the popular modern RISC processors and their assembly language. Professionals, programmers, and students seeking an authoritative and practical overview of RISC processors and assembly language programming will find the guide an essential resource.

Sivarama P. Dandamudi is a professor of computer science at Carleton University in Ottawa, Ontario, Canada, as well as associate editor responsible for computer architecture at the International Journal of Computers and Their Applications. He has more than two decades of experience teaching about computer systems and organization. 

 

Key Topics

* Processor design issues

* Evolution of CISC and RISC processors

* MIPS, SPARC, PowerPC, Itanium, and ARM architectures

* MIPS assembly language

* SPIM simulator and debugger

* Conditional execution

* Floating-point and logical and shift operations

* Number systems

 

 

Computer Architecture/Programming

Beginning/Intermediate Level

„Über diesen Titel“ kann sich auf eine andere Ausgabe dieses Titels beziehen.

  • VerlagSpringer
  • Erscheinungsdatum2005
  • ISBN 10 0387210172
  • ISBN 13 9780387210179
  • EinbandTapa dura
  • Anzahl der Seiten404

(Keine Angebote verfügbar)

Buch Finden:



Kaufgesuch aufgeben

Sie kennen Autor und Titel des Buches und finden es trotzdem nicht auf ZVAB? Dann geben Sie einen Suchauftrag auf und wir informieren Sie automatisch, sobald das Buch verfügbar ist!

Kaufgesuch aufgeben

Weitere beliebte Ausgaben desselben Titels

9781441919359: Guide to RISC Processors: for Programmers and Engineers

Vorgestellte Ausgabe

ISBN 10:  144191935X ISBN 13:  9781441919359
Verlag: Springer, 2010
Softcover

  • 9788181286635: Guide to RISC Processors for Programmers and Engineers

    Softcover

Beste Suchergebnisse beim ZVAB